[coreboot-gerrit] Patch merged into coreboot/master: soc/apollolake: Handle non-standard ACPI BAR in PMC device

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 717dccc3ee7d7f2f25386476b5ef30d8ce3effa4
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Wed Apr 6 10:49:55 2016 -0700

    soc/apollolake: Handle non-standard ACPI BAR in PMC device
    
    The ACPI BAR (BAR2 - offset 0x20) is not PCI compliant. That means
    that probing may not work. In that case, a resource still needs to be
    created for the BAR.
    
    BONUS: We now avoid the need to declare the MMIO resources as fixed.
    
    Change-Id: I52fd2d2718ac8013067aaa450c5eb31e00738ab9
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
    Reviewed-on: https://review.coreboot.org/14634
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/14634 for details.

-gerrit