[coreboot-gerrit] Patch set updated for coreboot: google/gale: Remove NAND init

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14664

-gerrit

commit 4a3d5499e0586df27a90c736813e1566aa8047e5
Author: Varadarajan Narayanan <varada at codeaurora.org>
Date:   Wed Sep 9 13:45:47 2015 +0530

    google/gale: Remove NAND init
    
    This is stale code from ipq806x, n/a for ipq40xx.
    Hence removing it.
    
    BUG=chrome-os-partner:49249
    TEST=None. Initial code not sure if it will even compile
    BRANCH=none
    
    Change-Id: I2ac73677f77d4bfbc70f56c73a661cc2c22dd384
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 2f9796588648bc477f118282aad89037f0577f23
    Original-Change-Id: I8bcf928ee23ac24a21b0e633e207354ea9fa0511
    Original-Signed-off-by: Varadarajan Narayanan <varada at codeaurora.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/333299
    Original-Commit-Ready: David Hendricks <dhendrix at chromium.org>
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
 src/mainboard/google/gale/cdp.c            | 40 ------------------------------
 src/mainboard/google/gale/mainboard.c      |  2 --
 src/soc/qualcomm/ipq40xx/include/soc/cdp.h |  2 --
 3 files changed, 44 deletions(-)

diff --git a/src/mainboard/google/gale/cdp.c b/src/mainboard/google/gale/cdp.c
index f8af96a..11a0f68 100644
--- a/src/mainboard/google/gale/cdp.c
+++ b/src/mainboard/google/gale/cdp.c
@@ -30,43 +30,3 @@ void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count)
 		gpio++;
 	}
 }
-
-static void configure_nand_gpio(void)
-{
-	/* EBI2 CS, CLE, ALE, WE, OE */
-	gpio_tlmm_config(34, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(35, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(36, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(37, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(38, 1, 0, GPIO_NO_PULL, GPIO_10MA, GPIO_DISABLE);
-
-	/* EBI2 BUSY */
-	gpio_tlmm_config(39, 1, 0, GPIO_PULL_UP, GPIO_10MA, GPIO_DISABLE);
-
-	/* EBI2 D7 - D0 */
-	gpio_tlmm_config(40, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(41, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(42, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(43, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(44, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(45, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(46, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
-	gpio_tlmm_config(47, 1, 0, GPIO_KEEPER, GPIO_10MA, GPIO_DISABLE);
-}
-
-void board_nand_init(void)
-{
-	struct ebi2cr_regs *ebi2_regs;
-
-	if (board_id() != BOARD_ID_PROTO_0_2_NAND)
-		return;
-
-	ebi2_regs = (struct ebi2cr_regs *) EBI2CR_BASE;
-
-	nand_clock_config();
-	configure_nand_gpio();
-
-	/* NAND Flash is connected to CS0 */
-	clrsetbits_le32(&ebi2_regs->chip_select_cfg0, CS0_CFG_MASK,
-			CS0_CFG_SERIAL_FLASH_DEVICE);
-}
diff --git a/src/mainboard/google/gale/mainboard.c b/src/mainboard/google/gale/mainboard.c
index 73c288b..9d99a2c 100644
--- a/src/mainboard/google/gale/mainboard.c
+++ b/src/mainboard/google/gale/mainboard.c
@@ -87,8 +87,6 @@ static void mainboard_init(device_t dev)
 	 setup_usb();
 	 assert_sw_reset();
 	 setup_tpm();
-	 /* Functionally a 0-cost no-op if NAND is not present */
-	 board_nand_init();
 
 #if IS_ENABLED(CONFIG_CHROMEOS)
 	/* Copy WIFI calibration data into CBMEM. */
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
index 57c679e..3a90048 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
@@ -172,6 +172,4 @@ static inline int gmac_cfg_is_valid(ipq_gmac_board_cfg_t *cfg)
 unsigned int get_board_index(unsigned machid);
 void ipq_configure_gpio(const gpio_func_data_t *gpio, unsigned count);
 
-void board_nand_init(void);
-
 #endif	/* _IPQ40XX_CDP_H_ */