[coreboot-gerrit] Patch set updated for coreboot: soc/qualcomm/ipq40xx: Fix GPIO no.s for BGA part

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14669

-gerrit

commit 431f3e61965f41678465e669e27231953978be28
Author: Varadarajan Narayanan <varada at codeaurora.org>
Date:   Thu Oct 1 16:11:29 2015 +0530

    soc/qualcomm/ipq40xx: Fix GPIO no.s for BGA part
    
    BUG=chrome-os-partner:49249
    TEST=None. Initial code not sure if it will even compile
    BRANCH=none
    
    Change-Id: I7c58fe7dc0132e8c01163fc049217f07081c658a
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: d746b667e309fd8eec62cf84e4ea4006ab2984f0
    Original-Change-Id: Idcb3189a812e75815eb15a61c1de273b5e218875
    Original-Signed-off-by: Varadarajan Narayanan <varada at codeaurora.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/333305
    Original-Commit-Ready: David Hendricks <dhendrix at chromium.org>
    Original-Tested-by: David Hendricks <dhendrix at chromium.org>
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
 src/soc/qualcomm/ipq40xx/Kconfig |  4 ++++
 src/soc/qualcomm/ipq40xx/uart.c  | 10 ++++++++++
 2 files changed, 14 insertions(+)

diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
index 37046ca..9817c1f 100644
--- a/src/soc/qualcomm/ipq40xx/Kconfig
+++ b/src/soc/qualcomm/ipq40xx/Kconfig
@@ -17,6 +17,10 @@ config CHROMEOS
 	select SEPARATE_VERSTAGE
 	select RETURN_FROM_VERSTAGE
 
+config IPQ_QFN_PART
+	bool "Is the SoC a BGA part or QFN part"
+	default n
+
 config MBN_ENCAPSULATION
 	depends on USE_BLOBS
 	bool "bootblock encapsulation for ipq40xx"
diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c
index 81b2281..0f8add5 100644
--- a/src/soc/qualcomm/ipq40xx/uart.c
+++ b/src/soc/qualcomm/ipq40xx/uart.c
@@ -59,15 +59,25 @@ static const uart_params_t uart_board_param = {
 	.blsp_uart = BLSP1_UART1,
 	.dbg_uart_gpio = {
 		{
+#if IS_ENABLED(CONFIG_IPQ_QFN_PART)
 			.gpio = 60,
 			.func = 2,
+#else	/* bga */
+			.gpio = 16,
+			.func = 1,
+#endif
 			.dir = GPIO_INPUT,
 			.pull = GPIO_NO_PULL,
 			.enable = GPIO_ENABLE
 		},
 		{
+#if IS_ENABLED(CONFIG_IPQ_QFN_PART)
 			.gpio = 61,
 			.func = 2,
+#else	/* bga */
+			.gpio = 17,
+			.func = 1,
+#endif
 			.dir = GPIO_OUTPUT,
 			.pull = GPIO_NO_PULL,
 			.enable = GPIO_ENABLE