[coreboot-gerrit] Patch set updated for coreboot: soc/qualcomm/ipq40xx: Update the list of MBNs needed for this SoC
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Mon May 9 19:57:27 CEST 2016
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14649
-gerrit
commit cee92faf40b11be1d09ac1b1bde62537c75d279b
Author: Varadarajan Narayanan <varada at codeaurora.org>
Date: Mon Feb 1 11:21:47 2016 +0530
soc/qualcomm/ipq40xx: Update the list of MBNs needed for this SoC
BUG=chrome-os-partner:49249 chrome-os-partner:50928
TEST=None. Initial code not sure if it will even compile
BRANCH=none
Change-Id: I91b873894975f0a88babc2e2ecdbe5676ee17c0b
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: a48131897217a6e48927d5aafc855a86551c35ca
Original-Change-Id: Ia7bab63e5abfb99ab0c03e0e2879149597b7355f
Original-Signed-off-by: Varadarajan Narayanan <varada at codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333294
Original-Commit-Ready: David Hendricks <dhendrix at chromium.org>
Original-Tested-by: David Hendricks <dhendrix at chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
src/soc/qualcomm/ipq40xx/Kconfig | 19 +++++++++++--------
src/soc/qualcomm/ipq40xx/Makefile.inc | 2 +-
2 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
index a122ac9..6848f74 100644
--- a/src/soc/qualcomm/ipq40xx/Kconfig
+++ b/src/soc/qualcomm/ipq40xx/Kconfig
@@ -22,13 +22,16 @@ config MBN_ENCAPSULATION
bool "bootblock encapsulation for ipq40xx"
default y
-config SBL_BLOB
- depends on USE_BLOBS
- string "file name of the Qualcomm SBL blob"
- default "3rdparty/blobs/cpu/qualcomm/ipq40xx/uber-sbl.mbn"
- help
- The path and filename of the binary blob containing
- ipq40xx early initialization code, as supplied by the
- vendor.
+config CDT_MBN
+ string "CDT binary blob"
+ default "cdt-AP.DK01.1-C1.bin"
+
+config DDR_MBN
+ string "DDR driver binary blob"
+ default "ddr.mbn"
+
+config TZ_MBN
+ string "TZ binary blob"
+ default "tzbsp_no_xpu.mbn"
endif
diff --git a/src/soc/qualcomm/ipq40xx/Makefile.inc b/src/soc/qualcomm/ipq40xx/Makefile.inc
index 95a78b3..e0cec00 100644
--- a/src/soc/qualcomm/ipq40xx/Makefile.inc
+++ b/src/soc/qualcomm/ipq40xx/Makefile.inc
@@ -70,7 +70,7 @@ endif
CPPFLAGS_common += -Isrc/soc/qualcomm/ipq40xx/include
# List of binary blobs coreboot needs in CBFS to be able to boot up this SOC
-mbn-files := cdt.mbn ddr.mbn rpm.mbn tz.mbn
+mbn-files := $(CONFIG_CDT_MBN) $(CONFIG_DDR_MBN) $(CONFIG_TZ_MBN)
# Location of the binary blobs
mbn-root := 3rdparty/blobs/cpu/qualcomm/ipq40xx
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