[coreboot-gerrit] Patch set updated for coreboot: google/gale: Remove some unwanted code
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Sat May 7 10:40:09 CEST 2016
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14674
-gerrit
commit e145e313bd061585e39b417a9b1157c9310ad113
Author: Varadarajan Narayanan <varada at codeaurora.org>
Date: Wed Nov 25 14:26:01 2015 +0530
google/gale: Remove some unwanted code
BUG=chrome-os-partner:49249
TEST=Compiles and boots
BRANCH=none
Change-Id: Ifc8df3b7e231eef944efec3a6f973b402c11bcaf
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 96a125f99af3eaa8931563fa74ccef8dd997f3ca
Original-Change-Id: Iebfe7429c400e7119510a51c3124d432f00af76d
Original-Signed-off-by: Varadarajan Narayanan <varada at codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333319
Original-Commit-Ready: David Hendricks <dhendrix at chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
src/mainboard/google/gale/chromeos.c | 2 ++
src/mainboard/google/gale/mainboard.c | 58 +++++------------------------------
2 files changed, 10 insertions(+), 50 deletions(-)
diff --git a/src/mainboard/google/gale/chromeos.c b/src/mainboard/google/gale/chromeos.c
index d01fbbe..c4af048 100644
--- a/src/mainboard/google/gale/chromeos.c
+++ b/src/mainboard/google/gale/chromeos.c
@@ -78,8 +78,10 @@ enum switch_state {
static void display_pattern(int pattern)
{
+#if IS_ENABLED(notyet)
if (board_id() == BOARD_ID_WHIRLWIND_SP5)
ww_ring_display_pattern(GSBI_ID_7, pattern);
+#endif
}
#define WIPEOUT_MODE_DELAY_MS (8 * 1000)
diff --git a/src/mainboard/google/gale/mainboard.c b/src/mainboard/google/gale/mainboard.c
index 9d99a2c..7db8025 100644
--- a/src/mainboard/google/gale/mainboard.c
+++ b/src/mainboard/google/gale/mainboard.c
@@ -31,62 +31,20 @@
static void setup_usb(void)
{
-#if !CONFIG_BOARD_VARIANT_AP148
- gpio_tlmm_config_set(USB_ENABLE_GPIO, FUNC_SEL_GPIO,
- GPIO_PULL_UP, GPIO_10MA, GPIO_ENABLE);
- gpio_set(USB_ENABLE_GPIO, 1);
-#endif
usb_clock_config();
setup_usb_host1();
}
-#define TPM_RESET_GPIO 22
-static void setup_tpm(void)
-{
- if (board_id() != BOARD_ID_PROTO_0)
- return; /* Only proto0 have TPM reset connected to GPIO22 */
-
- gpio_tlmm_config_set(TPM_RESET_GPIO, FUNC_SEL_GPIO, GPIO_PULL_UP,
- GPIO_4MA, GPIO_ENABLE);
- /*
- * Generate a reset pulse. The spec calls for 80 us minimum, let's
- * make it twice as long. If the output was driven low originally, the
- * reset pulse will be even longer.
- */
- gpio_set(TPM_RESET_GPIO, 0);
- udelay(160);
- gpio_set(TPM_RESET_GPIO, 1);
-}
-
-#define SW_RESET_GPIO 26
-static void assert_sw_reset(void)
-{
- if (board_id() == BOARD_ID_PROTO_0)
- return;
-
- /*
- * only proto0.2 and later care about this. We want to keep the
- * ethernet switch in reset, otherwise it comes up in default
- * (bridging) mode.
- */
- gpio_tlmm_config_set(SW_RESET_GPIO, FUNC_SEL_GPIO,
- GPIO_PULL_UP, GPIO_4MA, GPIO_ENABLE);
-
- gpio_set(SW_RESET_GPIO, 1);
-}
-
static void mainboard_init(device_t dev)
{
- /* disable mmu and d-cache before setting up secure world.*/
- dcache_mmu_disable();
- start_tzbsp();
- /* Setup mmu and d-cache again as non secure entries. */
- setup_mmu(DRAM_INITIALIZED);
- start_rpm();
- setup_usb();
- assert_sw_reset();
- setup_tpm();
+ /* disable mmu and d-cache before setting up secure world.*/
+ dcache_mmu_disable();
+ start_tzbsp();
+ /* Setup mmu and d-cache again as non secure entries. */
+ setup_mmu(DRAM_INITIALIZED);
+ setup_usb();
+ setup_tpm();
#if IS_ENABLED(CONFIG_CHROMEOS)
/* Copy WIFI calibration data into CBMEM. */
@@ -99,7 +57,7 @@ static void mainboard_init(device_t dev)
*
* 48000 * 2 * 16 * 4 = 6144000
*/
- audio_clock_config(6144000);
+ //audio_clock_config(6144000);
}
static void mainboard_enable(device_t dev)
More information about the coreboot-gerrit
mailing list