[coreboot-gerrit] New patch to review for coreboot: google/gru: select 1.8V as gpio2ab io domain

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14726

-gerrit

commit 1bb6a6b6800b5a6e4515790f26a6d15c6d3ea80c
Author: Lin Huang <hl at rock-chips.com>
Date:   Mon Mar 28 20:17:32 2016 +0800

    google/gru: select 1.8V as gpio2ab io domain
    
    On kevin board, both the gpio2ab's io domain APIO2_VDDPST and
    APIO2_VDD are 1.8V. So gpio2ab can only output 1.8V.
    
    BRANCH=none
    BUG=chrome-os-partner:52510
    TEST=Apply this patch, CPU1_SDIO_PWREN(GPIO2_A2) can output 1.8V
    
    Change-Id: Iefe58cf5ad83a8e79916ad177d148c1036283668
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 9c4afee265f3f31c1defee08cb89ab3e45ff8d1a
    Original-Change-Id: I0216c8efb7ef9256b878adeeee0a52335bf69f93
    Original-Signed-off-by: Lin Huang <hl at rock-chips.com>
    Original-Signed-off-by: Shunqian Zheng <zhengsq at rock-chips.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/337194
    Original-Commit-Ready: Vadim Bendebury <vbendeb at chromium.org>
    Original-Tested-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-by: Vadim Bendebury <vbendeb at chromium.org>
---
 src/mainboard/google/gru/bootblock.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c
index d08b4cb..74e02b2 100644
--- a/src/mainboard/google/gru/bootblock.c
+++ b/src/mainboard/google/gru/bootblock.c
@@ -22,6 +22,19 @@
 
 void bootblock_mainboard_early_init(void)
 {
+	/* Let gpio2ab io domains works at 1.8V.
+	 *
+	 * If io_vsel[0] == 0(default value), gpio2ab io domains is 3.0V
+	 * powerd by APIO2_VDD, otherwise, 1.8V supplied by APIO2_VDDPST.
+	 * But from the schematic of kevin rev0, the APIO2_VDD and
+	 * APIO2_VDDPST both are 1.8V(intentionally?).
+	 *
+	 * So, by default, CPU1_SDIO_PWREN(GPIO2_A2) can't output 3.0V
+	 * because the supply is 1.8V.
+	 * Let ask GPIO2_A2 output 1.8V to make GPIO interal logic happy.
+	 */
+	write32(&rk3399_grf->io_vsel, RK_SETBITS(1 << 0));
+
 	if (IS_ENABLED(CONFIG_DRIVERS_UART)) {
 		_Static_assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE,
 			       "CONSOLE_SERIAL_UART should be UART2");