[coreboot-gerrit] Patch set updated for coreboot: soc/mediatek/mt8173: mt6391: vcore sleep voltage should be 0.7V

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14696

-gerrit

commit 31cc6267c6724fe455ff16662a304beeb247ee10
Author: henryc.chen <henryc.chen at mediatek.com>
Date:   Mon Apr 25 15:53:29 2016 +0800

    soc/mediatek/mt8173: mt6391: vcore sleep voltage should be 0.7V
    
    Vcore voltage should be 0.7V during system suspend. Because data sheet of mt6391
    was not correct, need to config to 0x0 instead of 0x1.
    
    QI_VCORE_VSLEEP
    00: 0.7V
    01: 0.6V
    10: 0.65V
    11: 0.75V
    
    BUG=chrome-os-partner:52719
    TEST=powerd_dbus_suspend
    
    Change-Id: Ie504ebfb7cafae85bbba7919fce1578bbfbfafb7
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: cf15f5b63fac8968216772a8b37d2fe122414e24
    Original-Change-Id: Ide53eca328c28007e2181497c888724c8a91ae93
    Original-Signed-off-by: henryc.chen <henryc.chen at mediatek.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/340540
    Original-Commit-Ready: Yidi Lin <yidi.lin at mediatek.com>
    Original-Tested-by: Yidi Lin <yidi.lin at mediatek.com>
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
 src/soc/mediatek/mt8173/mt6391.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/soc/mediatek/mt8173/mt6391.c b/src/soc/mediatek/mt8173/mt6391.c
index f88fb8e..ec7fabc 100644
--- a/src/soc/mediatek/mt8173/mt6391.c
+++ b/src/soc/mediatek/mt8173/mt6391.c
@@ -193,7 +193,7 @@ static void mt6391_init_setting(void)
 	/* [12:0]: BUCK_RSV; for OC protection */
 	mt6391_write(PMIC_RG_BUCK_CON3, 0x600, 0x0FFF, 0);
 	/* [11:10]: QI_VCORE_VSLEEP; sleep mode only (0.7V) */
-	mt6391_write(PMIC_RG_BUCK_CON8, 0x1, 0x3, 10);
+	mt6391_write(PMIC_RG_BUCK_CON8, 0x0, 0x3, 10);
 	/* [7:6]: QI_VSRMCA7_VSLEEP; sleep mode only (0.85V) */
 	mt6391_write(PMIC_RG_BUCK_CON8, 0x0, 0x3, 6);
 	/* [5:4]: QI_VSRMCA15_VSLEEP; sleep mode only (0.7V) */