[coreboot-gerrit] New patch to review for coreboot: soc/intel/skylake: Enable another VR mailbox command for certain boards

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14688

-gerrit

commit 0ca06ada6636b979486b3bdaa521c49637156c1b
Author: Subrata Banik <subrata.banik at intel.com>
Date:   Wed Apr 20 14:19:53 2016 +0530

    soc/intel/skylake: Enable another VR mailbox command for certain boards
    
    Command List:
    Send command for PS4 exit fails
    
    BUG=chrome-os-partner:52355
    BRANCH=glados
    TEST=Build and boot lars and verify no hang during active idle
    
    CQ-DEPEND=CL:*257305
    
    Change-Id: I9ffae71b1a38433ffc48ee7be7e2a13e69ad5b87
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 96f00e2d153f92339c378ce256eb7ce6824e3368
    Original-Change-Id: I320ae154f3f7145811b57258ddb61b3beb584273
    Original-Signed-off-by: Subrata Banik <subrata.banik at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/341330
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/google/lars/devicetree.cb     | 3 +++
 src/mainboard/intel/kunimitsu/devicetree.cb | 3 +++
 src/soc/intel/skylake/chip.h                | 7 ++++---
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb
index 50b3e1e..5607ec8 100644
--- a/src/mainboard/google/lars/devicetree.cb
+++ b/src/mainboard/google/lars/devicetree.cb
@@ -169,6 +169,9 @@ chip soc/intel/skylake
 	# PL2 override 25W
 	register "tdp_pl2_override" = "25"
 
+	# Send an extra VR mailbox command for the PS4 exit issue
+	register "SendVrMbxCmd" = "2"
+
 	device cpu_cluster 0 on
 		device lapic 0 on end
 	end
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index 62a0c26..30039d8 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -173,6 +173,9 @@ chip soc/intel/skylake
 	# PL2 override 25W
 	register "tdp_pl2_override" = "25"
 
+	# Send an extra VR mailbox command for the PS4 exit issue
+	register "SendVrMbxCmd" = "2"
+
 	device cpu_cluster 0 on
 		device lapic 0 on end
 	end
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index ca902ae..857d8a1 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -330,9 +330,10 @@ struct soc_intel_skylake_config {
 	u8 speed_shift_enable;
 	/*
 	 * Enable VR specific mailbox command
-	 * When set, an extra VR mailbox command specifically
-	 * for the MPS IMPV8 VR will be sent.
-	 * 0 - Don't Send, 1 - Send
+	 * 000b - Don't Send any VR command
+	 * 001b - VR command specifically for the MPS IMPV8 VR will be sent
+	 * 010b - VR specific command sent for PS4 exit issue
+	 * 011b - VR specific command sent for both MPS IMPV8 & PS4 exit issue
 	*/
 	u8 SendVrMbxCmd;
 	/* Statically clock gate 8254 PIT. */