[coreboot-gerrit] New patch to review for coreboot: soc/qualcomm/ipq40xx: Add coreboot Table entry for serial console

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14662

-gerrit

commit c4b5e6f0bbb571ec4f6f06cfe0109f88b42b8a16
Author: Varadarajan Narayanan <varada at codeaurora.org>
Date:   Thu Oct 1 16:12:23 2015 +0530

    soc/qualcomm/ipq40xx: Add coreboot Table entry for serial console
    
    BUG=chrome-os-partner:49249
    TEST=Compiles...
    BRANCH=none
    
    Change-Id: I76a24bc9b3cec53d5c10ecd86e5c8e45285e9632
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 4ab1717ff020d564abffcee208b6587e1ae2f950
    Original-Change-Id: I2d155e80424d1c1837eb35703bd42ff3244e112a
    Original-Signed-off-by: Varadarajan Narayanan <varada at codeaurora.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/333306
    Original-Commit-Ready: David Hendricks <dhendrix at chromium.org>
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
 src/soc/qualcomm/ipq40xx/uart.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c
index 99b2b05..cb96a26 100644
--- a/src/soc/qualcomm/ipq40xx/uart.c
+++ b/src/soc/qualcomm/ipq40xx/uart.c
@@ -402,5 +402,14 @@ uint8_t uart_rx_byte(int idx)
 /* TODO: Implement function */
 void uart_fill_lb(void *data)
 {
+	struct lb_serial serial;
+
+	serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
+	serial.baseaddr = (uint32_t)UART1_DM_BASE;
+	serial.baud = default_baudrate();
+	serial.regwidth = 1;
+
+	lb_add_serial(&serial, data);
+	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
 #endif