[coreboot-gerrit] Patch merged into coreboot/master: intel/amenia: Configure the bridge to ChromeEC in the bootblock

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 5ff7031f729a319f35c9acdc1526a115a925398e
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Tue May 3 11:02:14 2016 -0700

    intel/amenia: Configure the bridge to ChromeEC in the bootblock
    
    Communication with ChromeEC, which is on the LPC bus, is needed early
    on for vboot purposes. I'm not sure if Google wants to have the
    interface available in bootblock or romstage, so we're confguring it
    in the bootblock.
    
    The bridge is automatically reconfigured during ramstage in a way in
    which we don't get duplicate windows opened upt to LPC.
    
    Change-Id: I77887e881d23f655495dec2687394409a5bb8cf5
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
    Reviewed-on: https://review.coreboot.org/14588
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/14588 for details.

-gerrit