[coreboot-gerrit] Patch set updated for coreboot: xip: Do not pass --xip for romstage and verstage if CAR supports code execution

[Furquan Shaikh (furquan@google.com)]

Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14623

-gerrit

commit 0b7e2af1166d9c389a0bdc90690c702dfe62d017
Author: Furquan Shaikh <furquan at google.com>
Date:   Wed May 4 23:25:16 2016 -0700

    xip: Do not pass --xip for romstage and verstage if CAR supports code
    execution
    
    On modern x86 platform like apollolake, pre-RAM stages verstage and
    romstage run within the cache-as-ram region. Thus, we do not need to
    pass in the --xip parameter to cbfstool while adding these
    stages. Introduce a new Kconfig variable NO_XIP_EARLY_STAGES which is default
    false for all x86 platforms. Apollolake selects this option since it
    supports code execution with CAR.
    
    Change-Id: I2848046472f40f09ce7fc230c258b0389851b2ea
    Signed-off-by: Furquan Shaikh <furquan at google.com>
---
 Makefile.inc                                       |  9 ++++++++-
 src/Kconfig                                        |  8 ++++++++
 src/soc/intel/apollolake/Kconfig                   |  1 +
 src/vendorcode/google/chromeos/vboot2/Makefile.inc | 10 ++++++++--
 4 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/Makefile.inc b/Makefile.inc
index 94273df..b02b8c3 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -798,7 +798,14 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
 #
 # Make sure that segment for .car.data is ignored while adding romstage.
 $(CONFIG_CBFS_PREFIX)/romstage-align := 64
-$(CONFIG_CBFS_PREFIX)/romstage-options := --xip -S .car.data -P $(CONFIG_XIP_ROM_SIZE)
+$(CONFIG_CBFS_PREFIX)/romstage-options := -S ".car.data"
+
+# If CAR does not support execution of code, romstage on x86 is expected to be
+# xip.
+ifneq ($(CONFIG_NO_XIP_EARLY_STAGES),y)
+$(CONFIG_CBFS_PREFIX)/romstage-options += --xip -P $(CONFIG_XIP_ROM_SIZE)
+endif
+
 endif
 
 cbfs-files-y += $(CONFIG_CBFS_PREFIX)/ramstage
diff --git a/src/Kconfig b/src/Kconfig
index f9bd661..b56f0107 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -199,6 +199,14 @@ config INCLUDE_CONFIG_FILE
 	    config                         0x8d740    raw          3324
 	    (empty)                        0x8e480    null         3610440
 
+config NO_XIP_EARLY_STAGES
+	bool
+	default n if ARCH_X86
+	default y
+	help
+	  Identify if --xip parameter needs to be passed into cbfstool for early
+	  stages.
+
 config EARLY_CBMEM_INIT
 	def_bool !LATE_CBMEM_INIT
 
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index bdb8eeb..b05c1da 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -19,6 +19,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	# Misc options
 	select C_ENVIRONMENT_BOOTBLOCK
+	select NO_XIP_EARLY_STAGES
 	select COLLECT_TIMESTAMPS
 	select HAVE_INTEL_FIRMWARE
 	select MMCONF_SUPPORT
diff --git a/src/vendorcode/google/chromeos/vboot2/Makefile.inc b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
index f934884..b0a3c12 100644
--- a/src/vendorcode/google/chromeos/vboot2/Makefile.inc
+++ b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
@@ -76,9 +76,15 @@ cbfs-files-$(CONFIG_SEPARATE_VERSTAGE) += $(CONFIG_CBFS_PREFIX)/verstage
 $(CONFIG_CBFS_PREFIX)/verstage-file := $(objcbfs)/verstage.elf
 $(CONFIG_CBFS_PREFIX)/verstage-type := stage
 $(CONFIG_CBFS_PREFIX)/verstage-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
-# Verstage on x86 expected to be xip.
+
 ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32)$(CONFIG_ARCH_VERSTAGE_X86_64),y)
-$(CONFIG_CBFS_PREFIX)/verstage-options := -a 64 --xip -S ".car.data"
+$(CONFIG_CBFS_PREFIX)/verstage-options := -a 64 -S ".car.data"
+
+# If CAR does not support execution of code, verstage on x86 is expected to be
+# xip.
+ifneq ($(CONFIG_NO_XIP_EARLY_STAGES),y)
+$(CONFIG_CBFS_PREFIX)/verstage-options += --xip
+endif
 
 endif