[coreboot-gerrit] New patch to review for coreboot: drivers/uart: Use uart_platform_refclk for all UART models
Leroy P Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Thu May 5 02:05:26 CEST 2016
Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14612
-gerrit
commit 54c609fa6fe75a42a6b1d6faa15e02f138992b10
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Wed Mar 16 10:21:59 2016 -0700
drivers/uart: Use uart_platform_refclk for all UART models
Allow the platform to override the input clock for the UART by
implementing the routine uart_platform_refclk and setting the Kconfig
value UART_OVERRIDE_REFCLK. Provide a default uart_platform_refclk
routine which is disabled when UART_OVERRIDE_REFCLK is selected. This
works around ROMCC not supporting weak routines.
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file:
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
UEFIPAYLOAD.fd
* Testing is successful when CorebootPayloadPkg is able to properly
initialize the serial port without using built-in values.
Change-Id: If4afc45a828e5ba935fecb6d95b239625e912d14
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/cpu/allwinner/a10/Kconfig | 1 +
src/cpu/ti/am335x/Kconfig | 1 +
src/drivers/uart/Kconfig | 8 ++++++++
src/drivers/uart/uart8250io.c | 7 +------
src/drivers/uart/util.c | 7 +++++++
src/soc/imgtec/pistachio/Kconfig | 1 +
src/soc/intel/apollolake/uart_early.c | 6 ------
src/soc/intel/quark/Kconfig | 1 +
src/soc/intel/skylake/uart_debug.c | 11 -----------
src/soc/marvell/armada38x/Kconfig | 1 +
src/soc/nvidia/tegra132/Kconfig | 1 +
src/southbridge/amd/pi/hudson/Kconfig | 1 +
12 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig
index 814b69e..0e5aba9 100644
--- a/src/cpu/allwinner/a10/Kconfig
+++ b/src/cpu/allwinner/a10/Kconfig
@@ -13,5 +13,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
select BOOTBLOCK_CONSOLE
+ select UART_OVERRIDE_REFCLK
endif # if CPU_ALLWINNER_A10
diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig
index 8d3c691..f44c69d 100644
--- a/src/cpu/ti/am335x/Kconfig
+++ b/src/cpu/ti/am335x/Kconfig
@@ -7,5 +7,6 @@ config CPU_TI_AM335X
select HAVE_UART_SPECIAL
select BOOTBLOCK_CONSOLE
select GENERIC_UDELAY
+ select UART_OVERRIDE_REFCLK
bool
default n
diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig
index aaf6e0e..cae9453 100644
--- a/src/drivers/uart/Kconfig
+++ b/src/drivers/uart/Kconfig
@@ -20,6 +20,13 @@ config UART_OVERRIDE_INPUT_CLOCK_DIVIDER
Set to "y" when the platform overrides the uart_input_clock_divider
routine.
+config UART_OVERRIDE_REFCLK
+ boolean
+ default n
+ help
+ Set to "y" when the platform overrides the uart_platform_refclk
+ routine.
+
config DRIVERS_UART_8250MEM
bool
default n
@@ -39,6 +46,7 @@ config DRIVERS_UART_OXPCIE
depends on PCI
select DRIVERS_UART_8250MEM
select EARLY_PCI_BRIDGE
+ select UART_OVERRIDE_REFCLK
help
Support for Oxford OXPCIe952 serial port PCIe cards.
Currently only devices with the vendor ID 0x1415 and device ID
diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c
index d85e497..59e0b11 100644
--- a/src/drivers/uart/uart8250io.c
+++ b/src/drivers/uart/uart8250io.c
@@ -27,11 +27,6 @@
/* Should support 8250, 16450, 16550, 16550A type UARTs */
-/* Nominal values only, good for the range of choices Kconfig offers for
- * set of standard baudrates.
- */
-#define BAUDRATE_REFCLK (115200 * 16)
-
/* Expected character delay at 1200bps is 9ms for a working UART
* and no flow-control. Assume UART as stuck if shift register
* or FIFO takes more than 50ms per character to appear empty.
@@ -110,7 +105,7 @@ uintptr_t uart_platform_base(int idx)
void uart_init(int idx)
{
unsigned int div;
- div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK,
+ div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(),
uart_input_clock_divider());
uart8250_init(uart_platform_base(idx), div);
}
diff --git a/src/drivers/uart/util.c b/src/drivers/uart/util.c
index 53c32ed..d92c7e4 100644
--- a/src/drivers/uart/util.c
+++ b/src/drivers/uart/util.c
@@ -49,3 +49,10 @@ unsigned int uart_input_clock_divider(void)
return 16;
}
#endif
+
+# if !IS_ENABLED(CONFIG_UART_OVERRIDE_REFCLK)
+unsigned int uart_platform_refclk(void)
+{
+ return 115200 * 16;
+}
+#endif
diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig
index 5ea6b95..da33cc5 100644
--- a/src/soc/imgtec/pistachio/Kconfig
+++ b/src/soc/imgtec/pistachio/Kconfig
@@ -25,6 +25,7 @@ config CPU_IMGTEC_PISTACHIO
select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
select HAVE_HARD_RESET
+ select UART_OVERRIDE_REFCLK
bool
if CPU_IMGTEC_PISTACHIO
diff --git a/src/soc/intel/apollolake/uart_early.c b/src/soc/intel/apollolake/uart_early.c
index e8dfeda..0e53060 100644
--- a/src/soc/intel/apollolake/uart_early.c
+++ b/src/soc/intel/apollolake/uart_early.c
@@ -68,12 +68,6 @@ uintptr_t uart_platform_base(int idx)
return (CONFIG_CONSOLE_UART_BASE_ADDRESS);
}
-unsigned int uart_platform_refclk(void)
-{
- /* That's within 0.5% of the actual value we've set earlier */
- return 115200 * 16;
-}
-
static const struct pad_config uart_gpios[] = {
PAD_CFG_NF(GPIO_42, NATIVE, DEEP, NF1), /* UART1 RX */
PAD_CFG_NF(GPIO_43, NATIVE, DEEP, NF1), /* UART1 TX */
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig
index ebdc899..1eb4fff 100644
--- a/src/soc/intel/quark/Kconfig
+++ b/src/soc/intel/quark/Kconfig
@@ -30,6 +30,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON
select SOC_SETS_MTRRS
select TSC_CONSTANT_RATE
+ select UART_OVERRIDE_REFCLK
select UDELAY_TSC
select UNCOMPRESSED_RAMSTAGE
select USE_MARCH_586
diff --git a/src/soc/intel/skylake/uart_debug.c b/src/soc/intel/skylake/uart_debug.c
index c463bea..f3d576b 100644
--- a/src/soc/intel/skylake/uart_debug.c
+++ b/src/soc/intel/skylake/uart_debug.c
@@ -18,17 +18,6 @@
#include <soc/iomap.h>
#include <soc/serialio.h>
-unsigned int uart_platform_refclk(void)
-{
- /*
- * Set M and N divisor inputs and enable clock.
- * Main reference frequency to UART is:
- * 120MHz * M / N = 120MHz * 48 / 3125 = 1843200Hz
- * The different order below is to handle integer math overflow.
- */
- return 120 * MHz / SIO_REG_PPR_CLOCK_N_DIV * SIO_REG_PPR_CLOCK_M_DIV;
-}
-
uintptr_t uart_platform_base(int idx)
{
/* Same base address for all debug port usage. In reality UART2
diff --git a/src/soc/marvell/armada38x/Kconfig b/src/soc/marvell/armada38x/Kconfig
index 6754a0f..ed8cbe8 100644
--- a/src/soc/marvell/armada38x/Kconfig
+++ b/src/soc/marvell/armada38x/Kconfig
@@ -10,6 +10,7 @@ config SOC_MARVELL_ARMADA38X
select RETURN_FROM_VERSTAGE
select BOOTBLOCK_CUSTOM
select GENERIC_UDELAY
+ select UART_OVERRIDE_REFCLK
if SOC_MARVELL_ARMADA38X
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index 502e7c4..08ed475 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -13,6 +13,7 @@ config SOC_NVIDIA_TEGRA132
select HAVE_HARD_RESET
select HAVE_UART_SPECIAL
select GENERIC_GPIO_LIB
+ select UART_OVERRIDE_REFCLK
if SOC_NVIDIA_TEGRA132
diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig
index aa55339..8fe3b2d 100644
--- a/src/southbridge/amd/pi/hudson/Kconfig
+++ b/src/southbridge/amd/pi/hudson/Kconfig
@@ -235,6 +235,7 @@ config HUDSON_UART
select DRIVERS_UART_8250MEM
select DRIVERS_UART_8250MEM_32
select NO_UART_ON_SUPERIO
+ select UART_OVERRIDE_REFCLK
help
There are two UART controllers in Kern.
The UART registers are memory-mapped. UART
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