[coreboot-gerrit] New patch to review for coreboot: build system: remove CBFSTOOL_PRE1_OPTS

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14567

-gerrit

commit 47c0d9aa7a1b2c4fa177631eae15683211558222
Author: Patrick Georgi <pgeorgi at chromium.org>
Date:   Mon May 2 16:28:18 2016 +0800

    build system: remove CBFSTOOL_PRE1_OPTS
    
    It isn't used anymore.
    
    Change-Id: Ie554d1dd87ae3f55547466e484c0864e55c9d102
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
---
 src/arch/arm/Makefile.inc    | 4 ----
 src/arch/arm64/Makefile.inc  | 4 ----
 src/arch/mips/Makefile.inc   | 4 ----
 src/arch/power8/Makefile.inc | 2 --
 src/arch/riscv/Makefile.inc  | 2 --
 src/arch/x86/Makefile.inc    | 5 -----
 6 files changed, 21 deletions(-)

diff --git a/src/arch/arm/Makefile.inc b/src/arch/arm/Makefile.inc
index d9c88c0..2742414 100644
--- a/src/arch/arm/Makefile.inc
+++ b/src/arch/arm/Makefile.inc
@@ -21,10 +21,6 @@
 # ARM specific options
 ###############################################################################
 
-ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM),y)
-CBFSTOOL_PRE1_OPTS = -m arm -s $(CONFIG_CBFS_SIZE)
-endif
-
 ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM),y)
 check-ramstage-overlap-regions += postram_cbfs_cache stack ttb
 endif
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
index dffdd9c..ece35a6 100644
--- a/src/arch/arm64/Makefile.inc
+++ b/src/arch/arm64/Makefile.inc
@@ -29,10 +29,6 @@ subdirs-y += armv8/
 # ARM specific options
 ################################################################################
 
-ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y)
-CBFSTOOL_PRE1_OPTS = -m arm64 -s $(CONFIG_CBFS_SIZE)
-endif
-
 ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM64),y)
 check-ramstage-overlap-regions += postram_cbfs_cache stack ttb
 endif
diff --git a/src/arch/mips/Makefile.inc b/src/arch/mips/Makefile.inc
index 0901388..cd474ee 100644
--- a/src/arch/mips/Makefile.inc
+++ b/src/arch/mips/Makefile.inc
@@ -18,10 +18,6 @@
 # MIPS specific options
 ###############################################################################
 
-ifeq ($(CONFIG_ARCH_ROMSTAGE_MIPS),y)
-CBFSTOOL_PRE1_OPTS = -m mips -s $(CONFIG_CBFS_SIZE)
-endif
-
 ifeq ($(CONFIG_ARCH_RAMSTAGE_MIPS),y)
 check-ramstage-overlap-regions += stack
 endif
diff --git a/src/arch/power8/Makefile.inc b/src/arch/power8/Makefile.inc
index 55c5470..98f9db1 100644
--- a/src/arch/power8/Makefile.inc
+++ b/src/arch/power8/Makefile.inc
@@ -71,8 +71,6 @@ $(objcbfs)/romstage.debug: $$(romstage-objs)
 romstage-c-ccopts += $(power8_flags)
 romstage-S-ccopts += $(power8_asm_flags)
 
-CBFSTOOL_PRE1_OPTS = -v -m power8 -s $(CONFIG_CBFS_SIZE)
-
 endif
 
 ################################################################################
diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc
index 4abaf58..6784d9b 100644
--- a/src/arch/riscv/Makefile.inc
+++ b/src/arch/riscv/Makefile.inc
@@ -75,8 +75,6 @@ $(objcbfs)/romstage.debug: $$(romstage-objs)
 romstage-c-ccopts += $(riscv_flags)
 romstage-S-ccopts += $(riscv_asm_flags)
 
-CBFSTOOL_PRE1_OPTS = -v -m riscv -s $(CONFIG_CBFS_SIZE)
-
 endif
 
 ################################################################################
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 10664c3..64d9892 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -47,11 +47,6 @@ cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
 mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
 mbi.bin-type := mbi
 
-ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
-CBFSTOOL_PRE1_OPTS = -m x86 -s $(CONFIG_ROM_SIZE) \
-		     -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) ))
-endif
-
 ## Calculate the base address of CBFS for later comparisons
 CBFS_BASE_ADDRESS=$(call int-add, $(call int-subtract, 0xffffffff $(CONFIG_CBFS_SIZE)) 1)