[coreboot-gerrit] Patch set updated for coreboot: southbridge: Remove trailing space in `dump_south()` output
Martin Roth (martinroth@google.com)
gerrit at coreboot.org
Thu Mar 31 22:42:47 CEST 2016
Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/5179
-gerrit
commit 4eb99ef7efb4834af5d77179fca02652401f13af
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date: Mon Feb 10 11:46:52 2014 +0100
southbridge: Remove trailing space in `dump_south()` output
Change-Id: I4df9f8ce1058a2bb219508d0c8d04e153d37131c
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
src/southbridge/amd/cs5535/cs5535.c | 4 ++--
src/southbridge/via/vt8237r/vt8237r.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/southbridge/amd/cs5535/cs5535.c b/src/southbridge/amd/cs5535/cs5535.c
index 70b8386..606bcb7 100644
--- a/src/southbridge/amd/cs5535/cs5535.c
+++ b/src/southbridge/amd/cs5535/cs5535.c
@@ -57,9 +57,9 @@ static void dump_south(struct device *dev)
int i, j;
for(i=0; i<256; i+=16) {
- printk(BIOS_DEBUG, "0x%02x: ", i);
+ printk(BIOS_DEBUG, "0x%02x:", i);
for(j=0; j<16; j++)
- printk(BIOS_DEBUG, "%02x ", pci_read_config8(dev, i+j));
+ printk(BIOS_DEBUG, " %02x", pci_read_config8(dev, i+j));
printk(BIOS_DEBUG, "\n");
}
}
diff --git a/src/southbridge/via/vt8237r/vt8237r.c b/src/southbridge/via/vt8237r/vt8237r.c
index f32aa3f..e1a0e35 100644
--- a/src/southbridge/via/vt8237r/vt8237r.c
+++ b/src/southbridge/via/vt8237r/vt8237r.c
@@ -49,9 +49,9 @@ void dump_south(device_t dev)
int i, j;
for (i = 0; i < 256; i += 16) {
- printk(BIOS_DEBUG, "%02x: ", i);
+ printk(BIOS_DEBUG, "%02x:", i);
for (j = 0; j < 16; j++)
- printk(BIOS_DEBUG, "%02x ", pci_read_config8(dev, i + j));
+ printk(BIOS_DEBUG, " %02x", pci_read_config8(dev, i + j));
printk(BIOS_DEBUG, "\n");
}
}
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