[coreboot-gerrit] Patch set updated for coreboot: ipq806x/storm: Return NULL for cbmem_top if DRAM is not initialized

[Furquan Shaikh (furquan@google.com)]

Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14182

-gerrit

commit 5f8b7f41544d63a8f9e5fe871006ef7bbf547c02
Author: Furquan Shaikh <furquan at google.com>
Date:   Mon Mar 28 13:29:33 2016 -0700

    ipq806x/storm: Return NULL for cbmem_top if DRAM is not initialized
    
    DRAM initialization on storm requires ipq blobs to be
    loaded from cbfs. vboot_locator first checks cbmem_find to see if cbmem is
    initialized and contains selected region info, else it falls back to
    vboot work buffer.
    
    Since cbmem_find calls into cbmem_top to identify the location of
    cbmem area, board/chipset is expected to return NULL until the backing
    store is ready, which in this case until DRAM is initialized in
    romstage, return NULL for cbmem_top.
    
    Change-Id: I1880ce61dcfdabaa527d7a6dcc3482dfe5d5fd17
    Signed-off-by: Furquan Shaikh <furquan at google.com>
---
 src/mainboard/google/storm/mmu.c                    |  2 ++
 src/soc/qualcomm/ipq806x/cbmem.c                    | 16 ++++++++++++++++
 src/soc/qualcomm/ipq806x/include/soc/soc_services.h |  3 +++
 3 files changed, 21 insertions(+)

diff --git a/src/mainboard/google/storm/mmu.c b/src/mainboard/google/storm/mmu.c
index 4d2e9a0..fcea8e2 100644
--- a/src/mainboard/google/storm/mmu.c
+++ b/src/mainboard/google/storm/mmu.c
@@ -34,6 +34,8 @@ void setup_dram_mappings(enum dram_state dram)
 		mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
 		/* Map DMA memory */
 		mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
+		/* Mark cbmem backing store as ready. */
+		ipq_cbmem_backing_store_ready();
 	} else {
 		mmu_disable_range(DRAM_START, DRAM_SIZE);
 		/* Map DMA memory */
diff --git a/src/soc/qualcomm/ipq806x/cbmem.c b/src/soc/qualcomm/ipq806x/cbmem.c
index 7aff231..05325cc 100644
--- a/src/soc/qualcomm/ipq806x/cbmem.c
+++ b/src/soc/qualcomm/ipq806x/cbmem.c
@@ -16,7 +16,23 @@
 #include <cbmem.h>
 #include <soc/soc_services.h>
 
+static int cbmem_backing_store_ready;
+
+void ipq_cbmem_backing_store_ready(void)
+{
+	cbmem_backing_store_ready = 1;
+}
+
 void *cbmem_top(void)
 {
+	/*
+	 * In romstage, make sure that cbmem backing store is ready before
+	 * returning pointer to cbmem top. Otherwise, it could lead to issues
+	 * with components that utilize cbmem in romstage (e.g. vboot_locator
+	 * for loading ipq blobs before DRAM is initialized).
+	 */
+	if (ENV_ROMSTAGE && (cbmem_backing_store_ready == 0))
+		return NULL;
+
 	return _memlayout_cbmem_top;
 }
diff --git a/src/soc/qualcomm/ipq806x/include/soc/soc_services.h b/src/soc/qualcomm/ipq806x/include/soc/soc_services.h
index 7006b82..e7a6d68 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/soc_services.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/soc_services.h
@@ -32,4 +32,7 @@ int tz_init_wrapper(int, int, void *);
 /* Load RPM code into memory and trigger its execution. */
 void start_rpm(void);
 
+/* Mark cbmem backing store as ready. */
+void ipq_cbmem_backing_store_ready(void);
+
 #endif