[coreboot-gerrit] Patch set updated for coreboot: cpu/x86: compile earlymtrr.c code for romstage as well
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Tue Mar 15 15:12:22 CET 2016
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14094
-gerrit
commit fcdd64deb0f30d322c9a83375df532cb14b08d3b
Author: Andrey Petrov <andrey.petrov at intel.com>
Date: Sun Mar 13 16:01:04 2016 -0700
cpu/x86: compile earlymtrr.c code for romstage as well
In order to make this work earlymtrr.c needed to be removed
from intel/truxton/romstage.c. It's not a ROMCC board so
there's no reason to be including .c files.
Change-Id: If4f5494a53773454b97b90fb856f7e52cadb3f44
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
src/cpu/x86/mtrr/Makefile.inc | 1 +
src/mainboard/intel/truxton/romstage.c | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/cpu/x86/mtrr/Makefile.inc b/src/cpu/x86/mtrr/Makefile.inc
index cecb826..9b7207b 100644
--- a/src/cpu/x86/mtrr/Makefile.inc
+++ b/src/cpu/x86/mtrr/Makefile.inc
@@ -1 +1,2 @@
ramstage-y += mtrr.c
+romstage-y += earlymtrr.c
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index 3ea6542..36f5495 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -26,7 +26,6 @@
#include "southbridge/intel/i3100/early_lpc.c"
#include <northbridge/intel/i3100/raminit_ep80579.h>
#include <superio/intel/i3100/i3100.h>
-#include "cpu/x86/mtrr/earlymtrr.c"
#include "lib/debug.c" // XXX
#include <cpu/x86/bist.h>
#include <spd.h>
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