[coreboot-gerrit] Patch set updated for coreboot: intel/fsp1.1: Mark graphics init done after SiliconInit phase

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13986

-gerrit

commit f93b6eb45a653b9b6ca590286d6f59273ef5b1cf
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Mar 7 13:21:56 2016 -0800

    intel/fsp1.1: Mark graphics init done after SiliconInit phase
    
    If the VBT was provided to the FSP GOP driver then graphics init
    will be done as part of SiliconInit step and we can mark that
    when it is completed.
    
    This will result in the "oprom" flag being set properly in the
    coreboot gpio table and the netboot firmware will have video.
    
    [pg: avoided conflict with Quark that comes without
         silicon_init_params.GraphicsConfigPtr]
    
    BUG=chrome-os-partner:50864
    BRANCH=glados
    TEST=boot image.net.bin on chell and get working graphics
    without being setuck in a reboot loop thinking graphics needs
    to be started when it already has been.
    
    Change-Id: I0e481b4be57096ed5c60d78e3fa00f3bb2a4eae1
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 089d93c712431d1b5923e844137c558994555e95
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/331301
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-(cherry picked from commit eeb9d470d8118422feb39ca71106972f2882e240)
    Original-Change-Id: Ic59bad27eb9f184ca3eba24643851bfadfe23ab5
    Original-Reviewed-on: https://chromium-review.googlesource.com/331355
---
 src/drivers/intel/fsp1_1/ramstage.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 277b609..834f148 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -14,6 +14,7 @@
  * GNU General Public License for more details.
  */
 
+#include <bootmode.h>
 #include <arch/acpi.h>
 #include <cbmem.h>
 #include <cbfs.h>
@@ -140,6 +141,14 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
 	timestamp_add_now(TS_FSP_SILICON_INIT_END);
 	printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
 
+	/* Mark graphics init done after SiliconInit if VBT was provided */
+#if IS_ENABLED(CONFIG_GOP_SUPPORT)
+	/* GraphicsConfigPtr doesn't exist in Quark X1000's FSP, so this needs
+	 * to be #if'd out instead of using if(). */
+	if (silicon_init_params.GraphicsConfigPtr)
+		gfx_set_init_done(1);
+#endif
+
 	display_hob_info(fsp_info_header);
 	soc_after_silicon_init();
 }