[coreboot-gerrit] New patch to review for coreboot: drivers/intel/fsp2_0: add TODOs to fix deficiencies

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13959

-gerrit

commit ec0da82c3c42be597d1c6db6909020a72c1b8546
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Tue Mar 8 11:20:53 2016 -0600

    drivers/intel/fsp2_0: add TODOs to fix deficiencies
    
    The FSP 2.0 implementation doesn't handle FSP modules for
    SoCs that are required to be XIP. There is no notion of
    "loading" in that situation where one should be copying
    anything anywhere.
    
    Additionally, the loading code does not handle overlaps within
    the current running program which is doing the loading.
    
    Change-Id: Ide145581f1dd84efb73a28ae51b3313183fa127a
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/drivers/intel/fsp2_0/util.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c
index da8aa9c..a234a7c 100644
--- a/src/drivers/intel/fsp2_0/util.c
+++ b/src/drivers/intel/fsp2_0/util.c
@@ -78,6 +78,7 @@ void fsp_print_header_info(const struct fsp_header *hdr)
 
 }
 
+/* TODO: this won't work for SoC's that need to XIP certain modules. */
 enum cb_err fsp_load_binary(struct fsp_header *hdr,
 			    const char *name,
 			    struct range_entry *range)
@@ -118,6 +119,7 @@ enum cb_err fsp_load_binary(struct fsp_header *hdr,
 	}
 
 	/* Check if the binary load address is within expected range */
+	/* TODO: this doesn't check the current running program footprint. */
 	if (range_entry_base(range) > hdr->image_base ||
 	    range_entry_end(range) <= hdr->image_base + hdr->image_size) {
 		printk(BIOS_ERR, "%s is outside of allowed range\n", name);