[coreboot-gerrit] New patch to review for coreboot: soc/intel/quark: Add the UPD support for SiliconInit

[Leroy P Leahy (leroy.p.leahy@intel.com)]

Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13897

-gerrit

commit c11a074ef6330fda127ae4e13456aaaaa4f57e0a
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Thu Mar 3 15:52:25 2016 -0800

    soc/intel/quark: Add the UPD support for SiliconInit
    
    Add the routines to handle the UPDs for SiliconInit.  Currently no
    support is required.
    
    Testing on Galileo:
    *  Edit the src/mainboard/intel/galileo/Makefile.inc file:
       *  Add "select ADD_FSP_PDAT_FILE"
       *  Add "select ADD_FSP_RAW_BIN"
       *  Add "select ADD_RMU_FILE"
    *  Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
    *  Place the pdat.bin files in the location specified by
       CONFIG_FSP_PDAT_FILE
    *  Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
    *  Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
       UEFIPAYLOAD.fd
    *  Edit .config file and add the following lines:
       *  CONFIG_DISPLAY_UPD_DATA=y
    *  Testing successful if coreboot calls SiliconInit
    
    Change-Id: I5176ab4b1ea7681c3095f102a86f4b614366c0fc
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/soc/intel/quark/chip.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/src/soc/intel/quark/chip.c b/src/soc/intel/quark/chip.c
index 3e11225..eb326d7 100644
--- a/src/soc/intel/quark/chip.c
+++ b/src/soc/intel/quark/chip.c
@@ -54,3 +54,30 @@ struct chip_operations soc_intel_quark_ops = {
 	.init		= &chip_init,
 	.enable_dev	= chip_enable_dev,
 };
+
+void soc_silicon_init_params(SILICON_INIT_UPD *params)
+{
+	struct soc_intel_quark_config *config;
+	device_t dev;
+
+	/* Locate the configuration data from devicetree.cb */
+	dev = dev_find_slot(0, LPC_DEV_FUNC);
+	if (!dev) {
+		printk(BIOS_ERR,
+			"Error! Device (PCI:0:%02x.%01x) not found, "
+			"soc_silicon_init_params!\n", PCI_DEVICE_NUMBER_QNC_LPC,
+			PCI_FUNCTION_NUMBER_QNC_LPC);
+		return;
+	}
+	config = dev->chip_info;
+
+	/* Set the parameters for SiliconInit */
+//	printk(BIOS_DEBUG, "Updating UPD values for SiliconInit\n");
+}
+
+void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
+	SILICON_INIT_UPD *new)
+{
+	/* Display the parameters for SiliconInit */
+//	printk(BIOS_SPEW, "UPD values for SiliconInit:\n");
+}