[coreboot-gerrit] Patch set updated for coreboot: RELOCATABLE_RAMSTAGE obsoletes RAMBASE and RAMTOP
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Tue Jun 28 12:07:39 CEST 2016
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15250
-gerrit
commit 238b86bd507af6bb26bc898dce38918b1cff6a88
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Sat Jun 18 07:39:31 2016 +0300
RELOCATABLE_RAMSTAGE obsoletes RAMBASE and RAMTOP
There is no fixed region of RAMBASE..RAMTOP where ramstage
gets loaded. To have RELOCATABLE_RAMSTAGE is not a decision
user could make in menuconfig, so hide it.
Change-Id: Ie90611274fb011759661d5c46c8e35e5cca6533c
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/Kconfig | 2 +-
src/arch/x86/Kconfig | 5 +++++
src/arch/x86/include/arch/memlayout.h | 9 +++++++--
src/arch/x86/memlayout.ld | 2 +-
src/northbridge/amd/agesa/Kconfig | 4 ----
src/northbridge/amd/pi/Kconfig | 4 ----
6 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index 7043851..b158d11 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -243,7 +243,7 @@ config RELOCATABLE_MODULES
config RELOCATABLE_RAMSTAGE
depends on EARLY_CBMEM_INIT
- bool "Build the ramstage to be relocatable in 32-bit address space."
+ bool
default n
select RELOCATABLE_MODULES
help
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index af73a58..e268661 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -79,15 +79,20 @@ config SIPI_VECTOR_IN_ROM
default n
depends on ARCH_X86
+if !RELOCATABLE_RAMSTAGE
+
config RAMBASE
hex
default 0x100000
+ depends on ARCH_X86
config RAMTOP
hex
default 0x200000
depends on ARCH_X86
+endif
+
# Traditionally BIOS region on SPI flash boot media was memory mapped right below
# 4G and it was the last region in the IFD. This way translation between CPU
# address space to flash address was trivial. However some IFDs on newer SoCs
diff --git a/src/arch/x86/include/arch/memlayout.h b/src/arch/x86/include/arch/memlayout.h
index 5f5cba6..2fa7943 100644
--- a/src/arch/x86/include/arch/memlayout.h
+++ b/src/arch/x86/include/arch/memlayout.h
@@ -24,8 +24,13 @@
#define ARCH_STAGE_HAS_BSS_SECTION 0
#endif
-#if !defined(CONFIG_RAMTOP) || !CONFIG_RAMTOP
-# error "CONFIG_RAMTOP not configured"
+#if IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)
+# define MAX_RAMSTAGE_SIZE (8<<20)
+#else
+# if !defined(CONFIG_RAMTOP) || !CONFIG_RAMTOP
+# error "CONFIG_RAMTOP not configured"
+# endif
+# define MAX_RAMSTAGE_SIZE (CONFIG_RAMTOP - CONFIG_RAMBASE)
#endif
#endif /* __ARCH_MEMLAYOUT_H */
diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld
index e6db0b8..48c9394 100644
--- a/src/arch/x86/memlayout.ld
+++ b/src/arch/x86/memlayout.ld
@@ -26,7 +26,7 @@ SECTIONS
* conditionalize with macros.
*/
#if ENV_RAMSTAGE
- RAMSTAGE(CONFIG_RAMBASE, CONFIG_RAMTOP - CONFIG_RAMBASE)
+ RAMSTAGE(CONFIG_RAMBASE, MAX_RAMSTAGE_SIZE)
#elif ENV_ROMSTAGE
/* The 1M size is not allocated. It's just for basic size checking.
diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig
index d5cff80..37bf3c4 100644
--- a/src/northbridge/amd/agesa/Kconfig
+++ b/src/northbridge/amd/agesa/Kconfig
@@ -35,8 +35,4 @@ config HEAP_SIZE
hex
default 0xc0000
-config RAMTOP
- hex
- default 0x400000
-
endif # NORTHBRIDGE_AMD_AGESA
diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
index cb72416..eea2897 100644
--- a/src/northbridge/amd/pi/Kconfig
+++ b/src/northbridge/amd/pi/Kconfig
@@ -40,10 +40,6 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
-config RAMTOP
- hex
- default 0x1000000
-
config HEAP_SIZE
hex
default 0xc0000
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