[coreboot-gerrit] New patch to review for coreboot: mainboard/google/reef: Configure DDI0, DDI1 HPD GPIO lines.
Abhay Kumar (abhay.kumar@intel.com)
gerrit at coreboot.org
Mon Jun 27 20:05:56 CEST 2016
Abhay Kumar (abhay.kumar at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15447
-gerrit
commit efad3c1563ac02999cbac31f535609f3baec2e9f
Author: Abhay Kumar <abhay.kumar at intel.com>
Date: Mon Jun 27 10:46:48 2016 -0700
mainboard/google/reef: Configure DDI0, DDI1 HPD GPIO lines.
Configure GPIO_199 and GPIO_200 as NF2 to work as HPD.
Change-Id: If3aa6b75ed22c221cfbedaecf16035cdd9939387
Signed-off-by: Abhay Kumar <abhay.kumar at intel.com>
---
src/mainboard/google/reef/gpio.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h
index 23628eb..177d605 100644
--- a/src/mainboard/google/reef/gpio.h
+++ b/src/mainboard/google/reef/gpio.h
@@ -178,8 +178,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPIO_198, NATIVE, DEEP, NF1), /* PNL1_BKLTCTL */
/* Hot plug detect. */
- PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF1), /* HV_DDI1_HPD */
- PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF1), /* HV_DDI0_HPD */
+ PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF2), /* HV_DDI1_HPD */
+ PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2), /* HV_DDI0_HPD */
/* MDSI signals -- unused */
PAD_CFG_GPI(GPIO_201, UP_20K, DEEP), /* MDSI_A_TE */
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