[coreboot-gerrit] Patch merged into coreboot/master: spd: Add module voltage for 1.8V
gerrit at coreboot.org
gerrit at coreboot.org
Fri Jun 24 18:08:19 CEST 2016
the following patch was just integrated into master:
commit 46bfce335337a11a9b48c496672bd6020e8dbaeb
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date: Wed Jun 15 19:05:11 2016 +0200
spd: Add module voltage for 1.8V
Add SSTL 1.8 V Interface Level as specified in
JEDEC_DDR2_SPD_Specification_ Rev1.3, page 10.
Change-Id: I0112a85f557826b629109e212dbbc752aeda305d
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
Reviewed-on: https://review.coreboot.org/15202
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd at gmail.com>
See https://review.coreboot.org/15202 for details.
-gerrit
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