[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: Implement global reset handling
Andrey Petrov (andrey.petrov@intel.com)
gerrit at coreboot.org
Thu Jun 23 17:37:10 CEST 2016
Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15199
-gerrit
commit bca894e97f4a877cff29df9e546f41f5cb309e21
Author: Andrey Petrov <andrey.petrov at intel.com>
Date: Tue Jun 14 22:20:28 2016 -0700
soc/intel/apollolake: Implement global reset handling
Global reset enable bit is not cleared on reset. Therefore, clear
the bit early. Lock down 0xcf9 so that payload/OS can't issue
global reset.
BUG=chrome-os-partner:54149
BRANCH=none
TEST=none
Change-Id: I3ddf6dd82429b725c818bcd96e163d2ca0acd308
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
src/soc/intel/apollolake/Makefile.inc | 1 +
src/soc/intel/apollolake/bootblock/bootblock.c | 4 ++++
src/soc/intel/apollolake/chip.c | 6 ++++++
3 files changed, 11 insertions(+)
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index d67a6bd..7326f14 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -15,6 +15,7 @@ bootblock-y += car.c
bootblock-y += gpio.c
bootblock-y += lpc_lib.c
bootblock-y += mmap_boot.c
+bootblock-y += pmutil.c
bootblock-y += spi.c
bootblock-y += tsc_freq.c
bootblock-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index 8413075..8c1ff91 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -25,6 +25,7 @@
#include <soc/mmap_boot.h>
#include <soc/northbridge.h>
#include <soc/pci_devs.h>
+#include <soc/pm.h>
#include <soc/uart.h>
#include <spi-generic.h>
#include <timestamp.h>
@@ -153,6 +154,9 @@ void bootblock_soc_early_init(void)
{
enable_pmcbar();
+ /* Clear global reset promotion bit */
+ global_reset_enable(0);
+
/* Prepare UART for serial console. */
if (IS_ENABLED(CONFIG_SOC_UART_DEBUG))
soc_console_uart_init();
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index dd4a0a5..ddb1374 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -32,6 +32,7 @@
#include <soc/nvs.h>
#include <soc/pci_devs.h>
#include <spi-generic.h>
+#include <soc/pm.h>
#include "chip.h"
@@ -93,6 +94,11 @@ static void soc_final(void *data)
{
if (vbt)
rdev_munmap(&vbt_rdev, vbt);
+
+ /* Disable global reset, just in case */
+ global_reset_enable(0);
+ /* Make sure payload/OS can't trigger global reset */
+ global_reset_lock();
}
void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
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