[coreboot-gerrit] Patch merged into coreboot/master: Ignore RAMTOP for MTRRs
gerrit at coreboot.org
gerrit at coreboot.org
Wed Jun 22 11:04:49 CEST 2016
the following patch was just integrated into master:
commit 65cc526f6f47755b4492cd9fc2134fb2dd067e90
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Sun Jun 19 20:38:41 2016 +0300
Ignore RAMTOP for MTRRs
Without RELOCATABLE_RAMSTAGE have WB cache large enough
to cover the greatest ramstage needs, as there is no benefit
of trying to accurately match the actual need. Choose
this to be bottom 16MiB.
With RELOCATABLE_RAMSTAGE write-back cache of low ram is
only useful for bottom 1MiB of RAM as a small part of this gets used
during SMP initialisation before proper MTRR setup.
Change-Id: Icd5f8461f81ed0e671130f1142641a48d1304f30
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
Reviewed-on: https://review.coreboot.org/15249
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
See https://review.coreboot.org/15249 for details.
-gerrit
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