[coreboot-gerrit] New patch to review for coreboot: AMD boards: Fix romstage main() declaration
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Fri Jun 17 20:19:17 CEST 2016
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15232
-gerrit
commit 4a93401cbc921081eca4a86362c8386382b3a380
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Fri Jun 17 07:55:03 2016 +0300
AMD boards: Fix romstage main() declaration
Boards incorrectly used intel include file for AMD board.
Change-Id: I6d3172d1aa5c91c989a6ef63066a7cd6f70013f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/include/cpu/amd/car.h | 2 ++
src/include/cpu/intel/romstage.h | 3 ---
src/mainboard/aaeon/pfm-540i_revb/romstage.c | 2 +-
src/mainboard/amd/db800/romstage.c | 2 +-
src/mainboard/amd/norwich/romstage.c | 2 +-
src/mainboard/amd/rumba/romstage.c | 2 +-
src/mainboard/artecgroup/dbe61/romstage.c | 2 +-
src/mainboard/bachmann/ot200/romstage.c | 2 +-
src/mainboard/bcom/winnetp680/romstage.c | 2 +-
src/mainboard/digitallogic/msm800sev/romstage.c | 2 +-
src/mainboard/dmp/vortex86ex/romstage.c | 1 -
src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 2 +-
src/mainboard/iei/pm-lx-800-r11/romstage.c | 2 +-
src/mainboard/iei/pm-lx2-800-r10/romstage.c | 2 +-
src/mainboard/jetway/j7f2/romstage.c | 2 +-
src/mainboard/lippert/frontrunner/romstage.c | 2 +-
src/mainboard/lippert/hurricane-lx/romstage.c | 2 +-
src/mainboard/lippert/literunner-lx/romstage.c | 2 +-
src/mainboard/lippert/roadrunner-lx/romstage.c | 2 +-
src/mainboard/lippert/spacerunner-lx/romstage.c | 2 +-
src/mainboard/pcengines/alix1c/romstage.c | 2 +-
src/mainboard/pcengines/alix2d/romstage.c | 2 +-
src/mainboard/traverse/geos/romstage.c | 2 +-
src/mainboard/via/epia-cn/romstage.c | 2 +-
src/mainboard/via/epia-m700/romstage.c | 2 +-
src/mainboard/via/epia-m850/romstage.c | 2 +-
src/mainboard/via/pc2500e/romstage.c | 2 +-
src/mainboard/via/vt8454c/romstage.c | 2 +-
src/mainboard/winent/pl6064/romstage.c | 2 +-
src/mainboard/wyse/s50/romstage.c | 2 +-
30 files changed, 29 insertions(+), 31 deletions(-)
diff --git a/src/include/cpu/amd/car.h b/src/include/cpu/amd/car.h
index d862753..6950a38 100644
--- a/src/include/cpu/amd/car.h
+++ b/src/include/cpu/amd/car.h
@@ -1,6 +1,8 @@
#ifndef _CPU_AMD_CAR_H
#define _CPU_AMD_CAR_H
+void main(unsigned long bist);
+
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
void done_cache_as_ram_main(void);
void post_cache_as_ram(void);
diff --git a/src/include/cpu/intel/romstage.h b/src/include/cpu/intel/romstage.h
index c294c2e..d443564 100644
--- a/src/include/cpu/intel/romstage.h
+++ b/src/include/cpu/intel/romstage.h
@@ -3,9 +3,6 @@
#include <arch/cpu.h>
-/* std signature of entry-point to romstage.c */
-void main(unsigned long bist);
-
void mainboard_romstage_entry(unsigned long bist);
void * asmlinkage romstage_main(unsigned long bist);
diff --git a/src/mainboard/aaeon/pfm-540i_revb/romstage.c b/src/mainboard/aaeon/pfm-540i_revb/romstage.c
index 474a115..946b825 100644
--- a/src/mainboard/aaeon/pfm-540i_revb/romstage.c
+++ b/src/mainboard/aaeon/pfm-540i_revb/romstage.c
@@ -25,6 +25,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
@@ -49,7 +50,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl[] = {
diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c
index 8d7e421..d93e916 100644
--- a/src/mainboard/amd/db800/romstage.c
+++ b/src/mainboard/amd/db800/romstage.c
@@ -22,6 +22,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
@@ -44,7 +45,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c
index 9374069..b5e7853 100644
--- a/src/mainboard/amd/norwich/romstage.c
+++ b/src/mainboard/amd/norwich/romstage.c
@@ -22,6 +22,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
@@ -40,7 +41,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c
index 6c52fc0..1d533bd 100644
--- a/src/mainboard/amd/rumba/romstage.c
+++ b/src/mainboard/amd/rumba/romstage.c
@@ -20,6 +20,7 @@
#include <superio/winbond/w83627hf/w83627hf.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/gx2def.h>
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -43,7 +44,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/geode_gx2/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl [] = {
diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c
index ec505adb..c8bd9cc 100644
--- a/src/mainboard/artecgroup/dbe61/romstage.c
+++ b/src/mainboard/artecgroup/dbe61/romstage.c
@@ -22,6 +22,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include "spd_table.h"
@@ -52,7 +53,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c
index e8897ac..1908cd3 100644
--- a/src/mainboard/bachmann/ot200/romstage.c
+++ b/src/mainboard/bachmann/ot200/romstage.c
@@ -24,6 +24,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -41,7 +42,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl[] = {
diff --git a/src/mainboard/bcom/winnetp680/romstage.c b/src/mainboard/bcom/winnetp680/romstage.c
index 40c87b6..f2144ff 100644
--- a/src/mainboard/bcom/winnetp680/romstage.c
+++ b/src/mainboard/bcom/winnetp680/romstage.c
@@ -23,6 +23,7 @@
#include <console/console.h>
#include <northbridge/via/cn700/raminit.h>
#include <cpu/x86/bist.h>
+#include <cpu/amd/car.h>
#include <delay.h>
#include <lib.h>
#include <spd.h>
@@ -75,7 +76,6 @@ static const struct mem_controller ctrl = {
.channel0 = { DIMM0 },
};
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
/* Enable multifunction for northbridge. */
diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index d36555e..93c00cc 100644
--- a/src/mainboard/digitallogic/msm800sev/romstage.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -6,6 +6,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <cpu/amd/car.h>
#include <southbridge/amd/cs5536/cs5536.h>
@@ -29,7 +30,6 @@ int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
diff --git a/src/mainboard/dmp/vortex86ex/romstage.c b/src/mainboard/dmp/vortex86ex/romstage.c
index 0b02373..d2cc146 100644
--- a/src/mainboard/dmp/vortex86ex/romstage.c
+++ b/src/mainboard/dmp/vortex86ex/romstage.c
@@ -298,7 +298,6 @@ static void enable_l2_cache(void)
pci_write_config8(NB1, 0xe8, reg_nb_f1_e8);
}
-#include <cpu/intel/romstage.h>
static void main(unsigned long bist)
{
u32 dmp_id;
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index c1a1834..db1c843 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
@@ -22,6 +22,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
@@ -44,7 +45,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c
index 77085e0..ed13641 100644
--- a/src/mainboard/iei/pm-lx-800-r11/romstage.c
+++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c
@@ -23,6 +23,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <southbridge/amd/cs5536/early_smbus.c>
@@ -48,7 +49,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include <cpu/amd/geode_lx/syspreinit.c>
#include <cpu/amd/geode_lx/msrinit.c>
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl[] = {
diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c
index 653225a..9abeaf9 100644
--- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c
+++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c
@@ -24,6 +24,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <southbridge/amd/cs5536/early_smbus.c>
@@ -48,7 +49,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include <cpu/amd/geode_lx/syspreinit.c>
#include <cpu/amd/geode_lx/msrinit.c>
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl[] = {
diff --git a/src/mainboard/jetway/j7f2/romstage.c b/src/mainboard/jetway/j7f2/romstage.c
index 42aaa0c..0de239c 100644
--- a/src/mainboard/jetway/j7f2/romstage.c
+++ b/src/mainboard/jetway/j7f2/romstage.c
@@ -23,6 +23,7 @@
#include <console/console.h>
#include <northbridge/via/cn700/raminit.h>
#include <cpu/x86/bist.h>
+#include <cpu/amd/car.h>
#include <delay.h>
#include "southbridge/via/vt8237r/early_smbus.c"
#include <superio/fintek/common/fintek.h>
@@ -80,7 +81,6 @@ static const struct mem_controller ctrl = {
.channel0 = { DIMM0 },
};
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
/* Enable multifunction for northbridge. */
diff --git a/src/mainboard/lippert/frontrunner/romstage.c b/src/mainboard/lippert/frontrunner/romstage.c
index 1f33423..15286e6 100644
--- a/src/mainboard/lippert/frontrunner/romstage.c
+++ b/src/mainboard/lippert/frontrunner/romstage.c
@@ -8,6 +8,7 @@
#include <superio/winbond/w83627hf/w83627hf.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/gx2def.h>
#include <southbridge/amd/cs5535/cs5535.h>
#include "southbridge/amd/cs5535/early_smbus.c"
@@ -69,7 +70,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_gx2/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl [] = {
diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c
index bf6dc9f..0c9e03a 100644
--- a/src/mainboard/lippert/hurricane-lx/romstage.c
+++ b/src/mainboard/lippert/hurricane-lx/romstage.c
@@ -25,6 +25,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
@@ -105,7 +106,6 @@ static void mb_gpio_init(void)
}
}
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c
index a65b9b8..efe322c 100644
--- a/src/mainboard/lippert/literunner-lx/romstage.c
+++ b/src/mainboard/lippert/literunner-lx/romstage.c
@@ -26,6 +26,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -145,7 +146,6 @@ static void mb_gpio_init(void)
}
}
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
int err;
diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c
index d4a95e4..d70e2c1 100644
--- a/src/mainboard/lippert/roadrunner-lx/romstage.c
+++ b/src/mainboard/lippert/roadrunner-lx/romstage.c
@@ -25,6 +25,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
@@ -80,7 +81,6 @@ static void mb_gpio_init(void)
}
}
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c
index 9486843..b3a13ad 100644
--- a/src/mainboard/lippert/spacerunner-lx/romstage.c
+++ b/src/mainboard/lippert/spacerunner-lx/romstage.c
@@ -26,6 +26,7 @@
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -143,7 +144,6 @@ static void mb_gpio_init(void)
}
}
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
int err;
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index f770fa5..c497434 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -23,6 +23,7 @@
#include <lib.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <cpu/amd/car.h>
#include <southbridge/amd/cs5536/cs5536.h>
@@ -98,7 +99,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl[] = {
diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c
index 592efc3..b467098 100644
--- a/src/mainboard/pcengines/alix2d/romstage.c
+++ b/src/mainboard/pcengines/alix2d/romstage.c
@@ -23,6 +23,7 @@
#include <lib.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <cpu/amd/car.h>
#include <southbridge/amd/cs5536/cs5536.h>
@@ -121,7 +122,6 @@ static void mb_gpio_init(void)
outl(1 << 11, GPIO_IO_BASE + GPIOH_OUTPUT_VALUE); /* Led 3 disabled */
}
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl[] = {
diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c
index a985d8c..42c067f 100644
--- a/src/mainboard/traverse/geos/romstage.c
+++ b/src/mainboard/traverse/geos/romstage.c
@@ -23,6 +23,7 @@
#include <lib.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
@@ -41,7 +42,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl[] = {
diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c
index b71fe1c..a28bf78 100644
--- a/src/mainboard/via/epia-cn/romstage.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -24,6 +24,7 @@
#include <lib.h>
#include <northbridge/via/cn700/raminit.h>
#include <cpu/x86/bist.h>
+#include <cpu/amd/car.h>
#include <delay.h>
#include "southbridge/via/vt8237r/early_smbus.c"
#include "southbridge/via/vt8237r/early_serial.c"
@@ -73,7 +74,6 @@ static const struct mem_controller ctrl = {
.channel0 = { DIMM0 },
};
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
/* Enable multifunction for northbridge. */
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index 6878623..9f2c14e 100644
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -30,6 +30,7 @@
#include <lib.h>
#include <northbridge/via/vx800/vx800.h>
#include <cpu/x86/bist.h>
+#include <cpu/amd/car.h>
#include <delay.h>
#include <string.h>
/* This file contains the board-special SI value for raminit.c. */
@@ -365,7 +366,6 @@ static void EmbedComInit(void)
#endif
/* cache_as_ram.inc jumps to here. */
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
u16 boot_mode;
diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c
index d40fd69..f3f0ec6 100644
--- a/src/mainboard/via/epia-m850/romstage.c
+++ b/src/mainboard/via/epia-m850/romstage.c
@@ -26,6 +26,7 @@
#include <console/console.h>
#include <lib.h>
#include <cpu/x86/bist.h>
+#include <cpu/amd/car.h>
#include <string.h>
#include <timestamp.h>
@@ -37,7 +38,6 @@
#define SERIAL_DEV PNP_DEV(0x4e, F81865F_SP1)
/* cache_as_ram.inc jumps to here. */
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
u32 tolm;
diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c
index 17efa38..7d12e87 100644
--- a/src/mainboard/via/pc2500e/romstage.c
+++ b/src/mainboard/via/pc2500e/romstage.c
@@ -24,6 +24,7 @@
#include <lib.h>
#include <northbridge/via/cn700/raminit.h>
#include <cpu/x86/bist.h>
+#include <cpu/amd/car.h>
#include <delay.h>
#include "southbridge/via/vt8237r/early_smbus.c"
#include <superio/ite/common/ite.h>
@@ -49,7 +50,6 @@ static const struct mem_controller ctrl = {
.channel0 = { DIMM0 }, /* TODO: CN700 currently only supports 1 DIMM. */
};
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
/* Enable multifunction for northbridge. */
diff --git a/src/mainboard/via/vt8454c/romstage.c b/src/mainboard/via/vt8454c/romstage.c
index f93b09a..d2af46c 100644
--- a/src/mainboard/via/vt8454c/romstage.c
+++ b/src/mainboard/via/vt8454c/romstage.c
@@ -23,6 +23,7 @@
#include <lib.h>
#include <northbridge/via/cx700/raminit.h>
#include <cpu/x86/bist.h>
+#include <cpu/amd/car.h>
#include <delay.h>
#include "northbridge/via/cx700/early_smbus.c"
#include "lib/debug.c"
@@ -76,7 +77,6 @@ static void enable_shadow_ram(const struct mem_controller *ctrl)
pci_write_config8(PCI_DEV(0, 0, 3), 0x83, shadowreg);
}
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
/* Set statically so it should work with cx700 as well */
diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c
index 37b70e1..a47b9dc 100644
--- a/src/mainboard/winent/pl6064/romstage.c
+++ b/src/mainboard/winent/pl6064/romstage.c
@@ -24,6 +24,7 @@
#include <lib.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/lxdef.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <spd.h>
@@ -46,7 +47,6 @@ int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_lx/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c
index fcfd942..9e6c5b2 100644
--- a/src/mainboard/wyse/s50/romstage.c
+++ b/src/mainboard/wyse/s50/romstage.c
@@ -22,6 +22,7 @@
#include <lib.h>
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/car.h>
#include <cpu/amd/gx2def.h>
#include <spd.h>
#include "southbridge/amd/cs5536/early_smbus.c"
@@ -43,7 +44,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
#include "cpu/amd/geode_gx2/syspreinit.c"
#include "cpu/amd/geode_lx/msrinit.c"
-#include <cpu/intel/romstage.h>
void main(unsigned long bist)
{
static const struct mem_controller memctrl [] = {
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