[coreboot-gerrit] Patch set updated for coreboot: qemu/x86: car: drop pointless code, move stack out of the way
Gerd Hoffmann (kraxel@redhat.com)
gerrit at coreboot.org
Fri Jun 17 08:52:48 CEST 2016
Gerd Hoffmann (kraxel at redhat.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15214
-gerrit
commit f56f8d67e2e65a20525f30e45c7107c78a0732d4
Author: Gerd Hoffmann <kraxel at redhat.com>
Date: Thu Jun 16 08:19:59 2016 +0200
qemu/x86: car: drop pointless code, move stack out of the way
RAM doesn't need any initialization on qemu, so we can simply use it
right away. No need to try using the cache as ram in the first place.
We also can place the stack in normal ram right from start and we
don't have to switch it to another place later on. Place the stack
in real mode memory which isn't used for something else.
Change-Id: Ib7a3f58a846d139f7babea5f43722a30fe0fe962
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
---
.../emulation/qemu-i440fx/cache_as_ram.inc | 25 ++++++++++------------
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc b/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
index fcd2d3b..db78164 100644
--- a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
+++ b/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
@@ -19,9 +19,6 @@
#include <cpu/x86/post_code.h>
#include <cbmem.h>
-#define CACHE_AS_RAM_SIZE 0x10000
-#define CACHE_AS_RAM_BASE 0xd0000
-
#define CPU_PHYSMASK_HI (1 << (CONFIG_CPU_ADDR_BITS - 32) - 1)
/* Save the BIST result. */
@@ -29,17 +26,19 @@
cache_as_ram:
post_code(0x20)
- /* Clear the cache memory region. This will also fill up the cache */
- movl $CACHE_AS_RAM_BASE, %esi
- movl %esi, %edi
- movl $(CACHE_AS_RAM_SIZE >> 2), %ecx
- // movl $0x23322332, %eax
- xorl %eax, %eax
- rep stosl
+ /*
+ * Nothing to do here on qemu, RAM works just fine without any
+ * initialization.
+ */
post_code(0x21)
- /* Set up the stack pointer. */
- movl $(CACHE_AS_RAM_SIZE + CACHE_AS_RAM_BASE - 4), %eax
+ /*
+ * Set up the stack pointer, use top of real mode (640k) memory.
+ * This value also keeps the copy_and_run stack out of the way
+ * of big ramstages. The ramstage will load its own %esp so
+ * there is no harm in using this value.
+ */
+ movl $0xa0000, %eax
movl %eax, %esp
/* Restore the BIST result. */
@@ -58,8 +57,6 @@ __main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
- movl $CONFIG_RAMTOP, %esp
- movl %esp, %ebp
call copy_and_run
.Lhlt:
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