[coreboot-gerrit] New patch to review for coreboot: intel/apollolake: Add CBMEM console to GNVS
Furquan Shaikh (furquan@google.com)
gerrit at coreboot.org
Tue Jun 14 07:36:24 CEST 2016
Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15177
-gerrit
commit 1860fb879f52fe5abd331279f516ffa19db1d620
Author: Furquan Shaikh <furquan at google.com>
Date: Mon Jun 13 22:23:49 2016 -0700
intel/apollolake: Add CBMEM console to GNVS
1. Add CMBC to GNVS Fields in globalnvs.asl
2. Add cmbc member to global_nvs_t structure in nvs.h
3. Initialize gnvs->cmbc to address of cbmem console
BUG=chrome-os-partner:54342
Change-Id: Idcd4573e626fa433c1623bdcbe29921de64539b2
Signed-off-by: Furquan Shaikh <furquan at google.com>
---
src/soc/intel/apollolake/acpi.c | 3 +++
src/soc/intel/apollolake/acpi/globalnvs.asl | 1 +
src/soc/intel/apollolake/include/soc/nvs.h | 3 ++-
3 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index c950255..f18a60c 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -144,6 +144,9 @@ unsigned long southbridge_write_acpi_tables(device_t device,
static void acpi_create_gnvs(struct global_nvs_t *gnvs)
{
+ if (IS_ENABLED(CONFIG_CONSOLE_CBMEM))
+ gnvs->cbmc = (uint32_t)cbmem_find(CBMEM_ID_CONSOLE);
+
if (IS_ENABLED(CONFIG_CHROMEOS)) {
/* Initialize Verified Boot data */
chromeos_init_vboot(&gnvs->chromeos);
diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl
index e081dcb..2464694 100644
--- a/src/soc/intel/apollolake/acpi/globalnvs.asl
+++ b/src/soc/intel/apollolake/acpi/globalnvs.asl
@@ -33,6 +33,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
LIDS, 8, // 0x03 - LID State
PWRS, 8, // 0x04 - AC Power State
DPTE, 8, // 0x05 - Enable DPTF
+ CBMC, 32, // 0x06 - 0x09 - Coreboot Memory Console
/* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */
Offset (0x100),
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
index 4768aaa..a7ddf77 100644
--- a/src/soc/intel/apollolake/include/soc/nvs.h
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -33,7 +33,8 @@ struct global_nvs_t {
uint8_t lids; /* 0x03 - LID State */
uint8_t pwrs; /* 0x04 - AC Power State */
uint8_t dpte; /* 0x05 - Enable DPTF */
- uint8_t unused[251];
+ uint32_t cbmc; /* 0x06 - 0x09 - Coreboot Memory Console */
+ uint8_t unused[247];
/* ChromeOS specific (0x100 - 0xfff) */
chromeos_acpi_t chromeos;
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