[coreboot-gerrit] New patch to review for coreboot: [HACK] soc/apollolake: Hide P2SB after siliconi_init
Lijian Zhao (lijian.zhao@intel.com)
gerrit at coreboot.org
Tue Jun 14 00:12:57 CEST 2016
Lijian Zhao (lijian.zhao at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15167
-gerrit
commit 6c2b92d7b433fbc016a7c2411680502545ed5d44
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date: Wed May 18 16:20:19 2016 -0700
[HACK] soc/apollolake: Hide P2SB after siliconi_init
The hack is still needed for FSP 139_40
Change-Id: I86c60792a60bbc0a6c1e59ad9e1e355e0f18d6c4
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Reviewed-on: https://chromium.devtools.intel.com/7382
Auto-Verified: chromeos <chromeos at intel.com>
Tested-by: Zhao, Lijian <lijian.zhao at intel.com>
Reviewed-by: Zhao, Lijian <lijian.zhao at intel.com>
Reviewed-on: https://chromium.devtools.intel.com/7690
CI-Queue: Petrov, Andrey <andrey.petrov at intel.com>
Reviewed-by: Petrov, Andrey <andrey.petrov at intel.com>
Tested-by: Petrov, Andrey <andrey.petrov at intel.com>
---
src/soc/intel/apollolake/chip.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 94a101f..a08063e 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -70,6 +70,30 @@ static void enable_dev(device_t dev)
}
}
+static void hide_p2sb(void)
+{
+ uint8_t reg8;
+ uint16_t reg16;
+ struct device *dev = dev_find_slot(0, PCI_DEVFN(0x0d, 0));
+
+ if (!dev) {
+ printk(BIOS_ERR, "Could not locate P2SB device (0:0d.0)!\n");
+ return;
+ }
+
+ reg16 = pci_read_config16(dev, PCI_VENDOR_ID);
+ printk(BIOS_DEBUG, "Vendor ID is %x!\n", reg16);
+
+ printk(BIOS_DEBUG, "Will now attempt to hide P2SB PCI device!\n");
+ reg8 = pci_read_config8(dev, 0xe1);
+ reg8 |= 1 << 0;
+ pci_write_config8(dev, 0xe1, reg8);
+
+ reg16 = pci_read_config16(dev, PCI_VENDOR_ID);
+ printk(BIOS_DEBUG, "Vendor ID is now %x... %s\n", reg16,
+ (reg16 == 0xffff) ? "HIDDEN" : "FAILED!!!");
+}
+
static void soc_init(void *data)
{
struct range_entry range;
@@ -83,6 +107,7 @@ static void soc_init(void *data)
/* TODO: fix for S3 resume, as this would corrupt OS memory */
range_entry_init(&range, 0x200000, 4ULL*GiB, 0);
fsp_silicon_init(&range);
+ hide_p2sb();
/* Allocate ACPI NVS in CBMEM */
gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
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