[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/apollolake: provide fake PM1 SMI status bit
gerrit at coreboot.org
gerrit at coreboot.org
Sun Jun 12 12:52:43 CEST 2016
the following patch was just integrated into master:
commit a554b71e3207556dd563c5253e79ff15a601dc0e
Author: Aaron Durbin <adurbin at chromium.org>
Date: Fri Jun 10 18:04:21 2016 -0500
soc/intel/apollolake: provide fake PM1 SMI status bit
It appears that PM1 is not wired up to the SMI status register, but
it does definitely cause SMIs to trigger. Therefore, provide a fake
PM1 status bit by checking the power button status when SMI status
is indicating no status as well as the PM1 control indicating that
SCI mode is not enabled.
BUG=chrome-os-partner:54262
TEST=Smashed power button on reef to cause SMI in firmware. No longer
loops infinitely with constant SMIs firing.
Change-Id: I9aa1b5f79b651cbc19a2d3353d9ef65429386889
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: https://review.coreboot.org/15155
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-by: Furquan Shaikh <furquan at google.com>
See https://review.coreboot.org/15155 for details.
-gerrit
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