[coreboot-gerrit] Patch set updated for coreboot: google/reef: Update EMMC DLL settings
Lijian Zhao (lijian.zhao@intel.com)
gerrit at coreboot.org
Sat Jun 11 01:21:40 CEST 2016
Lijian Zhao (lijian.zhao at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15156
-gerrit
commit 06c05b80bc84f9190d18af9c7413db70f0ac73d4
Author: Zhao, Lijian <lijian.zhao at intel.com>
Date: Fri Jun 10 16:11:08 2016 -0700
google/reef: Update EMMC DLL settings
Update EMMC DLL setting for reef board, after that system can
boot up into EMMC successfully.
BUG=54228
TEST=Boot up into EMMC and check with Rootdev
Change-Id: I614cd624dce9069c5565599a955f87906bcea53b
Signed-off-by: Zhao, Lijian <lijian.zhao at intel.com>
---
src/mainboard/google/reef/devicetree.cb | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/src/mainboard/google/reef/devicetree.cb b/src/mainboard/google/reef/devicetree.cb
index f442872..c202937 100644
--- a/src/mainboard/google/reef/devicetree.cb
+++ b/src/mainboard/google/reef/devicetree.cb
@@ -6,6 +6,13 @@ chip soc/intel/apollolake
register "pcie_rp4_clkreq_pin" = "0" # wifi/bt
+ /* EMMC DLL Settings */
+ register "emmc_tx_data_cntl1" = "0x0909"
+ register "emmc_tx_data_cntl2" = "0x1c1c1c00"
+ register "emmc_rx_cmd_data_cntl1" = "0x1c1c1c00"
+ register "emmc_rx_cmd_data_cntl2" = "0x1001c"
+
+
device domain 0 on
device pci 00.0 on end # - Host Bridge
device pci 00.1 on end # - DPTF
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