[coreboot-gerrit] New patch to review for coreboot: northbridge/amd/amdfam10: fix it to compile when DEBUG_SMBUS is enabled.
Ronald G. Minnich (rminnich@gmail.com)
gerrit at coreboot.org
Sat Jun 11 00:03:05 CEST 2016
Ronald G. Minnich (rminnich at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15153
-gerrit
commit 51f29c65ceae7300b51f32b39d86ff19eb4a443e
Author: Ronald G. Minnich <rminnich at google.com>
Date: Fri Jun 10 14:59:42 2016 -0700
northbridge/amd/amdfam10: fix it to compile when DEBUG_SMBUS is enabled.
This code would not compile when DEBUG_SMBUS was enabled.
I'm assuming that dump_spd_registers is correctly named
and that it should call read_spd_byte, not read_smbus_byte.
Declare the functions as inline and remove the compiler
guard so that it is always compiled and will therefore
continue to compile in the future.
Change-Id: I0cd190bf75f87ca4b6bfff16cdc9c914894514c8
Signed-off-by: Ronald G. Minnich <rminnich at google.com>
---
src/mainboard/asus/kgpe-d16/romstage.c | 2 +-
src/northbridge/amd/amdfam10/debug.c | 18 +++++++++---------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 8825b23..0e227cf 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -43,7 +43,6 @@
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
#include <southbridge/amd/sr5650/sr5650.h>
-#include "northbridge/amd/amdfam10/debug.c"
#include "northbridge/amd/amdfam10/setup_resource_map.c"
#define SERIAL_0_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
@@ -56,6 +55,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
return do_smbus_read_byte(SMBUS_AUX_IO_BASE, device, address);
}
+#include "northbridge/amd/amdfam10/debug.c"
#include <northbridge/amd/amdfam10/amdfam10.h>
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c"
#include "northbridge/amd/amdfam10/pci.c"
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c
index 27bd331..b9bfe4d 100644
--- a/src/northbridge/amd/amdfam10/debug.c
+++ b/src/northbridge/amd/amdfam10/debug.c
@@ -208,9 +208,7 @@ static inline void dump_pci_devices_on_bus(u32 busn)
}
}
-#if CONFIG_DEBUG_SMBUS
-
-static void dump_spd_registers(const struct mem_controller *ctrl)
+static inline void dump_spd_registers(const struct mem_controller *ctrl)
{
int i;
printk(BIOS_DEBUG, "\n");
@@ -226,7 +224,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
if ((j & 0xf) == 0) {
printk(BIOS_DEBUG, "\n%02x: ", j);
}
- status = smbus_read_byte(device, j);
+ status = spd_read_byte(device, j);
if (status < 0) {
break;
}
@@ -245,7 +243,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
if ((j & 0xf) == 0) {
printk(BIOS_DEBUG, "\n%02x: ", j);
}
- status = smbus_read_byte(device, j);
+ status = spd_read_byte(device, j);
if (status < 0) {
break;
}
@@ -256,18 +254,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
}
}
}
-static void dump_smbus_registers(void)
+
+static inline void dump_smbus_registers(void)
{
u32 device;
printk(BIOS_DEBUG, "\n");
for(device = 1; device < 0x80; device++) {
int j;
- if( smbus_read_byte(device, 0) < 0 ) continue;
+ if (spd_read_byte(device, 0) < 0)
+ continue;
printk(BIOS_DEBUG, "smbus: %02x", device);
for(j = 0; j < 256; j++) {
int status;
u8 byte;
- status = smbus_read_byte(device, j);
+ status = spd_read_byte(device, j);
if (status < 0) {
break;
}
@@ -280,7 +280,7 @@ static void dump_smbus_registers(void)
printk(BIOS_DEBUG, "\n");
}
}
-#endif
+
static inline void dump_io_resources(u32 port)
{
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