[coreboot-gerrit] Patch set updated for coreboot: arch/x86: Add debug spinloop
Leroy P Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Fri Jun 10 23:28:34 CEST 2016
Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15127
-gerrit
commit 365c4d505c7e801c957c90ce2b52e97a079e1fd6
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Tue Jun 7 08:45:17 2016 -0700
arch/x86: Add debug spinloop
Conditionally add a debug spinloop to enable easy connection of JTAG
debuggers.
TEST=Build and run on Galileo Gen2 with a JTAG debugger.
Change-Id: I7a21f9e6bfb10912d06ce48447c61202553630d0
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/arch/x86/Kconfig | 7 +++++++
src/arch/x86/bootblock_crt0.S | 9 +++++++++
2 files changed, 16 insertions(+)
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 8a96420..b102e00 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -117,6 +117,13 @@ config PC80_SYSTEM
bool
default y if ARCH_X86
+config BOOTBLOCK_DEBUG_SPINLOOP
+ bool
+ default n
+ help
+ Add a spin (JMP .) in bootblock_crt0.S during early bootblock to wait
+ for a JTAG debugger to break into the execution sequence.
+
config BOOTBLOCK_MAINBOARD_INIT
string
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S
index 9f4ab68..1b160f4 100644
--- a/src/arch/x86/bootblock_crt0.S
+++ b/src/arch/x86/bootblock_crt0.S
@@ -32,6 +32,15 @@
#include <cpu/x86/16bit/reset16.inc>
#include <cpu/x86/32bit/entry32.inc>
+#if IS_ENABLED(CONFIG_BOOTBLOCK_DEBUG_SPINLOOP)
+
+ /* Wait for a JTAG debugger to break in and set EBX non-zero */
+ xor %ebx, %ebx
+
+debug_spinloop:
+ cmp $0, %ebx
+ jz debug_spinloop
+#endif
bootblock_protected_mode_entry:
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