[coreboot-gerrit] Patch set updated for coreboot: arch/x86: Support "weak" BIST and timestamp save routines
Leroy P Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Thu Jun 9 02:42:39 CEST 2016
Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15126
-gerrit
commit f5bf125b08b9357241c1bb35dd65577a6852e42f
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Sun Jun 5 18:41:00 2016 -0700
arch/x86: Support "weak" BIST and timestamp save routines
Not all x86 architectures support the mm register set. Provide a "weak"
routine that saves BIST in mm0 and a "weak" routine that saves the TSC
value in mm2:mm1. Use the Kconfig value BOOTBLOCK_SAVE_BIST to specify
the "weak" routine to save the BIST value. Use the Kconfig value
BOOTBLOCK_SAVE_TIMESTAMP to specify the "weak" routine to get and save
the TSC value as the early timestamp.
TEST=Build and run on Amenia and Galileo Gen2.
Change-Id: I8119e74664ac3522c011767d424d441cd62545ce
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/arch/x86/Kconfig | 16 +++++++++++++++
src/arch/x86/bootblock_crt0.S | 19 ++++++++++++------
src/arch/x86/bootblock_save_bist.inc | 27 +++++++++++++++++++++++++
src/arch/x86/bootblock_save_timestamp.inc | 33 +++++++++++++++++++++++++++++++
4 files changed, 89 insertions(+), 6 deletions(-)
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 724c4db..753a13e 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -126,6 +126,22 @@ config BOOTBLOCK_NORTHBRIDGE_INIT
config BOOTBLOCK_RESETS
string
+config BOOTBLOCK_SAVE_BIST
+ string
+ default "src/arch/x86/bootblock_save_bist.inc"
+ help
+ Specify the file to use to save the BIST value. The default file
+ uses register MM0. Another file is necessary when the CPU does not
+ support the MMx register set.
+
+config BOOTBLOCK_SAVE_TIMESTAMP
+ string
+ default "src/arch/x86/bootblock_save_timestamp.inc"
+ help
+ Specify the file to use to save the timestamp value. The default
+ file uses registers MM1 and MM2. Another file is necessary when
+ the CPU does not support the MMx register set.
+
config HAVE_CMOS_DEFAULT
def_bool n
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S
index 7292b8b..4e49bce 100644
--- a/src/arch/x86/bootblock_crt0.S
+++ b/src/arch/x86/bootblock_crt0.S
@@ -34,12 +34,18 @@
bootblock_protected_mode_entry:
- /* Save BIST result */
- movd %eax, %mm0
- /* Save an early timestamp */
- rdtsc
- movd %eax, %mm1
- movd %edx, %mm2
+
+ /* Save BIST result:
+ * eax: BIST result
+ */
+#ifdef CONFIG_BOOTBLOCK_SAVE_BIST
+#include CONFIG_BOOTBLOCK_SAVE_BIST
+#endif
+
+ /* Save the timestamp value */
+#ifdef CONFIG_BOOTBLOCK_SAVE_TIMESTAMP
+#include CONFIG_BOOTBLOCK_SAVE_TIMESTAMP
+#endif
#if !IS_ENABLED(CONFIG_SSE)
enable_sse:
@@ -53,4 +59,5 @@ enable_sse:
#endif /* IS_ENABLED(CONFIG_SSE) */
/* We're done. Now it's up to platform-specific code */
+jump_to_soc_code:
jmp bootblock_pre_c_entry
diff --git a/src/arch/x86/bootblock_save_bist.inc b/src/arch/x86/bootblock_save_bist.inc
new file mode 100644
index 0000000..6474a8c
--- /dev/null
+++ b/src/arch/x86/bootblock_save_bist.inc
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Alexandru Gagniuc <mr.nuke.me at gmail.com>
+ * Copyright (C) 2016, Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Default BIST save routine.
+ */
+
+.global save_bist
+
+ /* Save BIST result:
+ * eax: BIST result
+ */
+
+save_bist:
+ movd %eax, %mm0
diff --git a/src/arch/x86/bootblock_save_timestamp.inc b/src/arch/x86/bootblock_save_timestamp.inc
new file mode 100644
index 0000000..d1cbe8a
--- /dev/null
+++ b/src/arch/x86/bootblock_save_timestamp.inc
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Alexandru Gagniuc <mr.nuke.me at gmail.com>
+ * Copyright (C) 2016, Intel Corporation
+
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Default timestamp save routine.
+ */
+
+.global save_timestamp
+
+ /* Get an early timestamp */
+ rdtsc
+
+ /* Save the timestamp value:
+ * eax: Low 32-bits of timestamp
+ * edx: High 32-bits of timestamp
+ */
+
+save_timestamp:
+ movd %eax, %mm1
+ movd %edx, %mm2
+
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