[coreboot-gerrit] New patch to review for coreboot: Apollolake: Define StackBase for FSP
Brandon Breitenstein (brandon.breitenstein@intel.com)
gerrit at coreboot.org
Sat Jun 4 00:28:58 CEST 2016
Brandon Breitenstein (brandon.breitenstein at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15067
-gerrit
commit 451552e20942737bee49fda05d02bf691b3748c2
Author: Brandon Breitenstein <brandon.breitenstein at intel.com>
Date: Fri May 27 13:40:34 2016 -0700
Apollolake: Define StackBase for FSP
FSP fixed an issue where StackBase being defined caused crashes
on boot. Now that this is fixed StackBase must be defined so a
valid Base address is there for Memory Init phase.
BUG=none
BRANCH=none
TEST=built and booted with new FSP code
Change-Id: I8df4e527fe08ad64bbbed10aa0a63fb10343b7db
Signed-off-by: Brandon Breitenstein <brandon.breitenstein at intel.com>
Reviewed-on: https://chromium.devtools.intel.com/7537
Auto-Verified: chromeos <chromeos at intel.com>
Reviewed-by: Petrov, Andrey <andrey.petrov at intel.com>
Tested-by: Petrov, Andrey <andrey.petrov at intel.com>
Reviewed-on: https://chromium.devtools.intel.com/7600
---
src/soc/intel/apollolake/romstage.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 434d11f..f95a87f 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -242,12 +242,10 @@ void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd)
*/
/* fsp does not work with StackBase modified, so use default */
-#if 0
- /* FIXME: remove this once FSP is fixed */
+
mupd->FspmArchUpd.StackBase = _car_region_end -
mupd->FspmArchUpd.StackSize;
-#endif
- arch_upd->Bootmode = FSP_BOOT_WITH_FULL_CONFIGURATION;
+ arch_upd->BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION;
if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) {
if (!mrc_cache_get_current_with_version(&mrc_cache, 0)) {
More information about the coreboot-gerrit
mailing list