[coreboot-gerrit] Patch merged into coreboot/master: mainboard/bap/ode_e20XX: Add different DDR3 clk settings
gerrit at coreboot.org
gerrit at coreboot.org
Sun Jul 31 20:00:25 CEST 2016
the following patch was just integrated into master:
commit 8cab72e1d857d430b5c9c4b748f4b46a84374168
Author: Fabian Kunkel <fabi at adv.bruhnspace.com>
Date: Tue Jul 26 22:46:23 2016 +0200
mainboard/bap/ode_e20XX: Add different DDR3 clk settings
This patch adds two SPD files with different DDR3 clk settings.
The user can choose which setting to use.
Lower clk settings saves power under load.
SoC Model GX-411GA supports only up to DDR3-1066 clk mode.
Both SPD settings were tested with memtest for several hours.
Power saving is around half a watt under heavy memory load.
Payload SeaBIOS 1.9.1 stable, Lubuntu 16.04, Kernel 4.4.0
Change-Id: Ibb81e22e19297fdf64360bc3e213529e9d183586
Signed-off-by: Fabian Kunkel <fabi at adv.bruhnspace.com>
Reviewed-on: https://review.coreboot.org/15907
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
See https://review.coreboot.org/15907 for details.
-gerrit
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