[coreboot-gerrit] Patch merged into coreboot/master: arch/riscv: Refactor bootblock.S

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 8e63017096e23a962bc017a6c0503dddc57f63e3
Author: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Date:   Sun Jul 24 18:12:09 2016 +0200

    arch/riscv: Refactor bootblock.S
    
    A few things are currently missing:
    - The trap handler doesn't set the stack pointer, which can easily
      result in trap loops or memory corruptions.
    - The SBI trampolin page (as described in version 1.9 of the RISC-V
      Privileged Architecture Specification), has been removed for now.
    
    Change-Id: Id89c859fab354501c94a0e82d349349c29fa4cc6
    Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
    Reviewed-on: https://review.coreboot.org/15591
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>


See https://review.coreboot.org/15591 for details.

-gerrit