[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp2_0: Update MRC cache with dead version in recovery
Furquan Shaikh (furquan@google.com)
gerrit at coreboot.org
Wed Jul 27 17:54:20 CEST 2016
Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15828
-gerrit
commit 94f8c9c40ba5a9c4619db0f29456f6c96d7be7e6
Author: Furquan Shaikh <furquan at google.com>
Date: Sun Jul 24 08:48:34 2016 -0700
drivers/intel/fsp2_0: Update MRC cache with dead version in recovery
If the system is in recovery, store the newly generated MRC data using a
dummy version which is not legit. This ensures that on next normal boot,
new MRC data will be generated and stored.
BUG=chrome-os-partner:55699
Change-Id: Ib13e8c978dc1b4fc8817fab16d0e606f210f2586
Signed-off-by: Furquan Shaikh <furquan at google.com>
---
src/drivers/intel/fsp2_0/memory_init.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 8afa6d7..004d7a8 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -57,6 +57,13 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
printk(BIOS_ERR, "Failed to stash MRC data\n");
}
+/*
+ * On every trip to recovery, newly generated MRC data is stored with this
+ * version since it is not expected to be a legit version. This ensures that on
+ * next normal boot, memory re-training occurs and new MRC data is stored.
+ */
+#define MRC_DEAD_VERSION (0xdeaddead)
+
static enum fsp_status do_fsp_post_memory_init(void *hob_list_ptr, bool s3wake,
uint32_t fsp_version)
{
@@ -86,6 +93,9 @@ static enum fsp_status do_fsp_post_memory_init(void *hob_list_ptr, bool s3wake,
/* Now that CBMEM is up, save the list so ramstage can use it */
fsp_save_hob_list(hob_list_ptr);
+ if (recovery_mode_enabled())
+ fsp_version = MRC_DEAD_VERSION;
+
save_memory_training_data(s3wake, fsp_version);
/* Create romstage handof information */
More information about the coreboot-gerrit
mailing list