[coreboot-gerrit] Patch merged into coreboot/master: arch/x86: Add bootblock and postcar support for SOC MTRR access
gerrit at coreboot.org
gerrit at coreboot.org
Wed Jul 27 13:50:49 CEST 2016
the following patch was just integrated into master:
commit 5f4b4c42964445d1bc517c461090f17655e84131
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Sun Jul 24 08:09:40 2016 -0700
arch/x86: Add bootblock and postcar support for SOC MTRR access
Quark does not support the rdmsr and wrmsr instructions. Use SOC
specific routines to configure the MTRRs on Quark based platforms.
Add cpu_common.c as a build dependency to provide access to the routine
cpu_phys_address_size.
TEST=Build and run on Galileo Gen2
Change-Id: I43b7067c66c5c55b42097937e862078adf17fb19
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
Reviewed-on: https://review.coreboot.org/15846
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
See https://review.coreboot.org/15846 for details.
-gerrit
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