[coreboot-gerrit] Patch set updated for coreboot: intel/apollolake: Add soc specific DPTF values

[Shaunak Saha (shaunak.saha@intel.com)]

Shaunak Saha (shaunak.saha at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15619

-gerrit

commit bf971db31feaa1b50ffe73590414e717c9e2b929
Author: Shaunak Saha <shaunak.saha at intel.com>
Date:   Tue Jul 12 00:42:06 2016 -0700

    intel/apollolake: Add soc specific DPTF values
    
    This patch adds apollolake soc specific change. DPTF
    ASL files are now in src/soc/intel/common so that
    they can be reused but different soc can have different values
    e.g., for skylake cpu soc thermal reporting device is at
    Bus 0, Device 4, Function 0 while for apollolake it is Bus 0, Device 0,
    Function 1. This patch adds a dptf asl file in soc directory where we
    can define all values which can change across soc's and can be
    included in mainboard dptf asl.
    
    BUG = chrome-os-partner:53096
    TEST = In Amenia and Reef board verify that the thermal zones are
           enumerated under /sys/class/thermal in Amenia and Reef board.
           Navigate to /sys/class/thermal, and verify that a thermal
           zone of type TCPU exists there.
    
    Change-Id: I888260a9c799d36512411a769f26dd30cf8d5788
    Signed-off-by: Shaunak Saha <shaunak.saha at intel.com>
---
 src/soc/intel/apollolake/acpi/dptf.asl | 44 ++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/src/soc/intel/apollolake/acpi/dptf.asl b/src/soc/intel/apollolake/acpi/dptf.asl
new file mode 100644
index 0000000..743fa92
--- /dev/null
+++ b/src/soc/intel/apollolake/acpi/dptf.asl
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define DPTF_CPU_DEVICE		TCPU
+
+#ifndef DPTF_CPU_PASSIVE
+#definie DPTF_CPU_PASSIVE	80
+#endif
+
+#ifndef DPTF_CPU_CRITICAL
+#define DPTF_CPU_CRITICAL	90
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC0
+#define DPTF_CPU_ACTIVE_AC0	90
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC1
+#define DPTF_CPU_ACTIVE_AC1	80
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC2
+#define DPTF_CPU_ACTIVE_AC2	70
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC3
+#define DPTF_CPU_ACTIVE_AC3	60
+#endif
+
+#ifndef DPTF_CPU_ACTIVE_AC4
+#define DPTF_CPU_ACTIVE_AC4	50
+#endif