[coreboot-gerrit] Patch set updated for coreboot: google/reef: Write protect GPIO relative to bank offset

[Susendra Selvaraj (susendra.selvaraj@intel.com)]

Susendra Selvaraj (susendra.selvaraj at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15691

-gerrit

commit 70be5b68c036e99e6c817b55d254ebe930b5a605
Author: Susendra Selvaraj <susendra.selvaraj at intel.com>
Date:   Wed Jun 22 03:52:03 2016 +0530

    google/reef: Write protect GPIO relative to bank offset
    
    Update the write protect GPIO reported in ACPI to GPIO_75.
    Also update the controller ID to "INT3452:01" which will
    point at the goldmont device and includes write protect GPIO.
    
    BUG=chrome-os-partner:55604
    BRANCH=none
    TEST=verify crossystem output for wpsw_cur.
    
    Change-Id: Ibe6a013aaab18bfa2436698298177218ca934fab
    Signed-off-by: Susendra Selvaraj <susendra.selvaraj at intel.com>
    Reviewed-on: https://coreboot.intel.com/7929
    Reviewed-by: Petrov, Andrey <andrey.petrov at intel.com>
    Tested-by: Petrov, Andrey <andrey.petrov at intel.com>
---
 src/mainboard/google/reef/acpi/chromeos.asl | 4 ++--
 src/mainboard/google/reef/dsdt.asl          | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/google/reef/acpi/chromeos.asl b/src/mainboard/google/reef/acpi/chromeos.asl
index d6a0080..bec6bcb 100644
--- a/src/mainboard/google/reef/acpi/chromeos.asl
+++ b/src/mainboard/google/reef/acpi/chromeos.asl
@@ -17,7 +17,7 @@
 
 Name (OIPG, Package () {
 	/* No physical recovery GPIO. */
-	Package () { 0x0001, 0, 0xFFFFFFFF, "INT3452:00" },
+	Package () { 0x0001, 0, 0xFFFFFFFF, "INT3452:01" },
 	/* Firmware write protect GPIO. */
-	Package () { 0x0003, 1, GPIO_75, "INT3452:00" },
+	Package () { 0x0003, 1, PAD_NW(GPIO_75), "INT3452:01" },
 })
diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl
index e48db4b..009c960 100644
--- a/src/mainboard/google/reef/dsdt.asl
+++ b/src/mainboard/google/reef/dsdt.asl
@@ -35,7 +35,7 @@ DefinitionBlock(
 			#include <soc/intel/apollolake/acpi/southbridge.asl>
 		}
 	}
-
+	
 	/* Chrome OS specific */
 	#include "acpi/chromeos.asl"
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>