[coreboot-gerrit] Patch set updated for coreboot: google/reef: Write protect GPIO relative to bank offset
Susendra Selvaraj (susendra.selvaraj@intel.com)
gerrit at coreboot.org
Tue Jul 26 16:41:35 CEST 2016
Susendra Selvaraj (susendra.selvaraj at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15691
-gerrit
commit 26a08d56db1aa37faa2e9db105c3b450b1cc5f38
Author: Susendra Selvaraj <susendra.selvaraj at intel.com>
Date: Wed Jun 22 03:52:03 2016 +0530
google/reef: Write protect GPIO relative to bank offset
Update the write protect GPIO reported in ACPI to GPIO_75.
Also update the controller ID to "INT3452:01" which will
point at the goldmont device and includes write protect GPIO.
BUG=none
BRANCH=none
TEST=verify crossystem output for wpsw_cur.
Change-Id: Ibe6a013aaab18bfa2436698298177218ca934fab
Signed-off-by: sselvar2 <susendra.selvaraj at intel.com>
Reviewed-on: https://coreboot.intel.com/7929
Reviewed-by: Petrov, Andrey <andrey.petrov at intel.com>
Tested-by: Petrov, Andrey <andrey.petrov at intel.com>
---
src/mainboard/google/reef/acpi/chromeos.asl | 4 ++--
src/mainboard/google/reef/dsdt.asl | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/google/reef/acpi/chromeos.asl b/src/mainboard/google/reef/acpi/chromeos.asl
index d6a0080..bec6bcb 100644
--- a/src/mainboard/google/reef/acpi/chromeos.asl
+++ b/src/mainboard/google/reef/acpi/chromeos.asl
@@ -17,7 +17,7 @@
Name (OIPG, Package () {
/* No physical recovery GPIO. */
- Package () { 0x0001, 0, 0xFFFFFFFF, "INT3452:00" },
+ Package () { 0x0001, 0, 0xFFFFFFFF, "INT3452:01" },
/* Firmware write protect GPIO. */
- Package () { 0x0003, 1, GPIO_75, "INT3452:00" },
+ Package () { 0x0003, 1, PAD_NW(GPIO_75), "INT3452:01" },
})
diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl
index e48db4b..6d36902 100644
--- a/src/mainboard/google/reef/dsdt.asl
+++ b/src/mainboard/google/reef/dsdt.asl
@@ -36,9 +36,10 @@ DefinitionBlock(
}
}
- /* Chrome OS specific */
+ #if IS_ENABLED(CONFIG_CHROMEOS)
#include "acpi/chromeos.asl"
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
+ #endif
/* Chipset specific sleep states */
#include <soc/intel/apollolake/acpi/sleepstates.asl>
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