[coreboot-gerrit] Patch set updated for coreboot: armv4: add dcache policiy enumeration

[Subrata Banik (subrata.banik@intel.com)]

Subrata Banik (subrata.banik at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15838

-gerrit

commit b34a84d0494f78212afec4d469ac23e9b2bfe741
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Mon Jul 25 11:30:43 2016 -0500

    armv4: add dcache policiy enumeration
    
    Some mainboards (nyans) are using architecture specific references
    in the device tree. However, if one is to include the static
    device tree in bootblock which doesn't have the value then the
    build will break. Duplicate the enumeration from armv7 even though
    the values aren't used at runtime.
    
    Change-Id: I6a0848231f5e28d36ec2d56b239bed67619fe5a7
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/arch/arm/include/armv4/arch/cache.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/arch/arm/include/armv4/arch/cache.h b/src/arch/arm/include/armv4/arch/cache.h
index 65f5966..ebea00c 100644
--- a/src/arch/arm/include/armv4/arch/cache.h
+++ b/src/arch/arm/include/armv4/arch/cache.h
@@ -36,6 +36,15 @@
 #include <stddef.h>
 #include <stdint.h>
 
+/* This is here for mainboards which use architecture specific headers
+ * in their devicetree. It doesn't hurt in practice, and this matches the
+ * same values as armv7. */
+enum dcache_policy {
+	DCACHE_OFF,
+	DCACHE_WRITEBACK,
+	DCACHE_WRITETHROUGH,
+};
+
 /*
  * Cache maintenance API
  */