[coreboot-gerrit] New patch to review for coreboot: drivers/intel/fsp2_0: Display SiliconInit parameter

[Lee Leahy (leroy.p.leahy@intel.com)]

Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15854

-gerrit

commit 3b55587fcfdaf714e557d04a2761d2a91858b648
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Sun Jul 24 18:21:13 2016 -0700

    drivers/intel/fsp2_0: Display SiliconInit parameter
    
    Display the call to SiliconInit and the parameter that is passed.
    
    TEST=Build and run on Galileo Gen2
    
    Change-Id: I53efdb93cb25a5d16f3f7083ca3d9968df188a27
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/drivers/intel/fsp2_0/silicon_init.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 831fba9..deb88f8 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -45,16 +45,18 @@ static enum fsp_status do_silicon_init(struct fsp_header *hdr)
 
 	/* Give SoC/mainboard a chance to populate entries */
 	platform_fsp_silicon_init_params_cb(&upd);
+	silicon_init = (void *) (hdr->image_base +
+				 hdr->silicon_init_entry_offset);
 
 	/* Display the UPD data */
 	if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
 		fsps_display_upd_params(supd, &upd);
+	printk(BIOS_DEBUG, "Calling FspSiliconInit: 0x%p\n", silicon_init);
+	printk(BIOS_SPEW, "\t%p: upd\n", &upd);
 
 	/* Call SiliconInit */
 	timestamp_add_now(TS_FSP_SILICON_INIT_START);
 	post_code(POST_FSP_SILICON_INIT);
-	silicon_init = (void *) (hdr->image_base +
-				 hdr->silicon_init_entry_offset);
 	status = silicon_init(&upd);
 	timestamp_add_now(TS_FSP_SILICON_INIT_END);
 	post_code(POST_FSP_SILICON_INIT);