[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resume

Abhay Kumar (abhay.kumar@intel.com) gerrit at coreboot.org
Mon Jul 25 20:42:21 CEST 2016


Abhay Kumar (abhay.kumar at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14575

-gerrit

commit bafd6be98fb69d6b5b0b14d5c22963d9ccbf3dc2
Author: Abhay Kumar <abhay.kumar at intel.com>
Date:   Thu Jul 14 18:43:54 2016 -0700

    soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resume
    
    Do not pass VBT table to fsp in normal mode and S3 resume so that
    PEIM GFX will not get initialized.
    
    Change-Id: Iab7be3cceb0f80ae0273940b36fdd9c41bdb121e
    Signed-off-by: Abhay Kumar <abhay.kumar at intel.com>
---
 src/soc/intel/apollolake/chip.c |  3 +--
 src/soc/intel/common/vbt.c      | 19 +++++++++++++++++++
 src/soc/intel/common/vbt.h      |  3 +++
 3 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index c71e59a..728c8a3 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -194,8 +194,7 @@ static void soc_init(void *data)
 	struct global_nvs_t *gnvs;
 
 	/* Save VBT info and mapping */
-	if (locate_vbt(&vbt_rdev) != CB_ERR)
-		vbt = rdev_mmap_full(&vbt_rdev);
+	vbt = vbt_get(&vbt_rdev);
 
 	/* Snapshot the current GPIO IRQ polarities. FSP is setting a
 	 * default policy that doesn't honor boards' requirements. */
diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c
index 80b17a2..ff93ad5 100644
--- a/src/soc/intel/common/vbt.c
+++ b/src/soc/intel/common/vbt.c
@@ -15,6 +15,8 @@
 
 #include <cbfs.h>
 #include <console/console.h>
+#include <arch/acpi.h>
+#include <bootmode.h>
 
 #include "vbt.h"
 
@@ -40,3 +42,20 @@ enum cb_err locate_vbt(struct region_device *rdev)
 
 	return CB_SUCCESS;
 }
+
+void *vbt_get(struct region_device *rdev)
+{
+	void *vbt_data;
+
+	/* Normal mode and S3 resume path PEIM GFX init is not needed.
+	 * Passing NULL as VBT will not make PEIM GFX to execute. */
+	if (acpi_is_wakeup_s3())
+		return NULL;
+	if (!display_init_required())
+		return NULL;
+	if (locate_vbt(rdev) != CB_ERR) {
+		vbt_data = rdev_mmap_full(rdev);
+		return vbt_data;
+	}else
+		return NULL;
+}
diff --git a/src/soc/intel/common/vbt.h b/src/soc/intel/common/vbt.h
index e1a45cc..6a2ba75 100644
--- a/src/soc/intel/common/vbt.h
+++ b/src/soc/intel/common/vbt.h
@@ -21,4 +21,7 @@
 
 /* locate .vbt file */
 enum cb_err locate_vbt(struct region_device *rdev);
+/* Get VBT data after parsing the prerequisites of Pre OS
+ * Graphics initialization */
+void *vbt_get(struct region_device *rdev);
 #endif



More information about the coreboot-gerrit mailing list