[coreboot-gerrit] Patch set updated for coreboot: mainboard/kunimitsu: Define mainboard hook in bootblock

Subrata Banik (subrata.banik@intel.com) gerrit at coreboot.org
Sat Jul 23 23:25:04 CEST 2016


Subrata Banik (subrata.banik at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15786

-gerrit

commit e15b844f6546779d2c9d12dbc7614b3ac184de15
Author: Subrata Banik <subrata.banik at intel.com>
Date:   Thu Jul 21 23:47:38 2016 +0530

    mainboard/kunimitsu: Define mainboard hook in bootblock
    
    Move mainboard post console init functionality from car.c
    to bootblock.
    
    BUG=chrome-os-partner:55357
    BRANCH=none
    TEST=Built and boot kunimitsu till POST code 0x34
    
    Change-Id: I1b912985a0234d103dcf025b1a88094e639d197d
    Signed-off-by: Barnali Sarkar <barnali.sarkar at intel.com>
    Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
    Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
 src/mainboard/intel/kunimitsu/Makefile.inc         |  5 ++---
 .../intel/kunimitsu/bootblock_mainboard.c          | 26 ++++++++++++++++++++++
 2 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/intel/kunimitsu/Makefile.inc b/src/mainboard/intel/kunimitsu/Makefile.inc
index 4bf6e0a..1561b24 100644
--- a/src/mainboard/intel/kunimitsu/Makefile.inc
+++ b/src/mainboard/intel/kunimitsu/Makefile.inc
@@ -16,8 +16,9 @@
 
 subdirs-y += spd
 
+bootblock-y += bootblock_mainboard.c
+
 romstage-y += boardid.c
-romstage-y += car.c
 romstage-y += pei_data.c
 
 verstage-$(CONFIG_CHROMEOS) += chromeos.c
@@ -32,5 +33,3 @@ ramstage-y += pei_data.c
 ramstage-y += ramstage.c
 
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
-
-verstage-y += car.c
diff --git a/src/mainboard/intel/kunimitsu/bootblock_mainboard.c b/src/mainboard/intel/kunimitsu/bootblock_mainboard.c
new file mode 100644
index 0000000..6c7619c
--- /dev/null
+++ b/src/mainboard/intel/kunimitsu/bootblock_mainboard.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <soc/gpio.h>
+#include "gpio.h"
+
+void bootblock_mainboard_init(void)
+{
+	/* This is a hack for FSP because it does things in MemoryInit()
+	 * which it shouldn't do. We have to prepare certain gpios here
+	 * because of the brokenness in FSP. */
+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}



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