[coreboot-gerrit] New patch to review for coreboot: google/gale: Fix board ID and GPIO config.
Martin Roth (martinroth@google.com)
gerrit at coreboot.org
Fri Jul 22 19:51:08 CEST 2016
Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15809
-gerrit
commit 661133e387ca36799519a494b13d32dcd6c37ee7
Author: Kan Yan <kyan at google.com>
Date: Thu Jul 14 18:05:20 2016 -0700
google/gale: Fix board ID and GPIO config.
Fix the board ID handling.
Recovery switch and WP status GPIO has been reassigned in board rev3.
Configure related GPIOs based on Board ID.
BUG=chrome-os-partner:55320
TEST=Verified GPIO assignment for Rev.1 board.
BRANCH=None
Change-Id: Id8e1ba1c039f8b5b503f0da038e5cfc84b72678f
Signed-off-by: Martin Roth <martinroth at chromium.org>
Original-Commit-Id: d295ab514e31d9ebd1b77e0af9b769e64cbf567e
Original-Change-Id: I6d3d5df2e9017f7845edc3cd0b2c19ad7c58a97c
Original-Signed-off-by: Kan Yan <kyan at google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/361393
Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
src/mainboard/google/gale/Makefile.inc | 1 +
src/mainboard/google/gale/boardid.c | 18 ++---------
src/mainboard/google/gale/chromeos.c | 49 +++++++++++++++++++++++-------
src/soc/qualcomm/ipq40xx/include/soc/cdp.h | 8 ++---
4 files changed, 45 insertions(+), 31 deletions(-)
diff --git a/src/mainboard/google/gale/Makefile.inc b/src/mainboard/google/gale/Makefile.inc
index e623675..6c7e55f 100644
--- a/src/mainboard/google/gale/Makefile.inc
+++ b/src/mainboard/google/gale/Makefile.inc
@@ -27,6 +27,7 @@ verstage-y += reset.c
verstage-y += verstage.c
romstage-y += romstage.c
+romstage-y += boardid.c
romstage-y += cdp.c
romstage-y += chromeos.c
romstage-y += mmu.c
diff --git a/src/mainboard/google/gale/boardid.c b/src/mainboard/google/gale/boardid.c
index 295550f..3e6fd8a 100644
--- a/src/mainboard/google/gale/boardid.c
+++ b/src/mainboard/google/gale/boardid.c
@@ -19,18 +19,8 @@
#include <stdlib.h>
/*
- * Storm boards dedicate to the board ID three GPIOs in tertiary mode: 29, 30
- * and 68. On proto0 GPIO68 is used and tied low, so it reads as 'zero' by
- * gpio_base3_value(), whereas the other two pins are not connected
- * and read as 'two'. This results in gpio_base3_value() returning
- * 8 on proto0.
- *
- * Three tertitiary signals could represent 27 different values. To make
- * calculated board ID value continuous and starting at zero, offset the
- * calculated value by 19 (i.e. 27 - 8) and return modulo 27 of the offset
- * number. This results in proto0 returning zero as the board ID, the future
- * revisions will have the inputs configured to match the actual board
- * revision.
+ * Gale boards dedicate to the board ID three GPIOs in ternary mode: 64, 65
+ * and 66.
*/
static int board_id_value = -1;
@@ -38,11 +28,9 @@ static int board_id_value = -1;
static uint8_t get_board_id(void)
{
uint8_t bid;
- gpio_t hw_rev_gpios[] = {[2] = 68, [1] = 30, [0] = 29}; /* 29 is LSB */
- int offset = 19;
+ gpio_t hw_rev_gpios[] = {[2] = 66, [1] = 65, [0] = 64}; /* 64 is LSB */
bid = gpio_base3_value(hw_rev_gpios, ARRAY_SIZE(hw_rev_gpios));
- bid = (bid + offset) % 27;
printk(BIOS_INFO, "Board ID %d\n", bid);
return bid;
diff --git a/src/mainboard/google/gale/chromeos.c b/src/mainboard/google/gale/chromeos.c
index beeb2a5..06b3d85 100644
--- a/src/mainboard/google/gale/chromeos.c
+++ b/src/mainboard/google/gale/chromeos.c
@@ -25,13 +25,36 @@
#include <timer.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#define DEV_SW 41
+#define DEV_SW 41
#define DEV_POL ACTIVE_LOW
-#define REC_SW 7
#define REC_POL ACTIVE_LOW
-#define WP_SW 6
-#define WP_POL ACTIVE_LOW
+#define WP_POL ACTIVE_LOW
+static int get_rec_sw_gpio_pin(void)
+{
+ uint8_t board_rev = board_id();
+ switch (board_rev) {
+ case BOARD_ID_GALE_EVT:
+ case BOARD_ID_GALE_EVT2:
+ return 7;
+ case BOARD_ID_GALE_EVT3:
+ default:
+ return 57;
+ }
+}
+
+static int get_wp_status_gpio_pin(void)
+{
+ uint8_t board_rev = board_id();
+ switch (board_rev) {
+ case BOARD_ID_GALE_EVT:
+ case BOARD_ID_GALE_EVT2:
+ return 6;
+ case BOARD_ID_GALE_EVT3:
+ default:
+ return 53;
+ }
+}
static int read_gpio(gpio_t gpio_num)
{
gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE,
@@ -43,9 +66,11 @@ static int read_gpio(gpio_t gpio_num)
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
- {DEV_SW, ACTIVE_LOW, read_gpio(DEV_SW), "developer"},
- {REC_SW, ACTIVE_LOW, read_gpio(REC_SW), "recovery"},
- {WP_SW, ACTIVE_LOW, read_gpio(WP_SW), "write protect"},
+ {DEV_SW, DEV_POL, read_gpio(DEV_SW), "developer"},
+ {get_rec_sw_gpio_pin(), REC_POL,
+ read_gpio(get_rec_sw_gpio_pin()), "recovery"},
+ {get_wp_status_gpio_pin(), WP_POL,
+ read_gpio(get_wp_status_gpio_pin()), "write protect"},
{-1, ACTIVE_LOW, 1, "power"},
{-1, ACTIVE_LOW, 0, "lid"},
};
@@ -88,12 +113,14 @@ static enum switch_state get_switch_state(void)
{
struct stopwatch sw;
int sampled_value;
+ uint8_t rec_sw;
static enum switch_state saved_state = not_probed;
if (saved_state != not_probed)
return saved_state;
- sampled_value = read_gpio(REC_SW) ^ !REC_POL;
+ rec_sw = get_rec_sw_gpio_pin();
+ sampled_value = read_gpio(rec_sw) ^ !REC_POL;
if (!sampled_value) {
saved_state = no_req;
@@ -107,7 +134,7 @@ static enum switch_state get_switch_state(void)
stopwatch_init_msecs_expire(&sw, WIPEOUT_MODE_DELAY_MS);
do {
- sampled_value = read_gpio(REC_SW) ^ !REC_POL;
+ sampled_value = read_gpio(rec_sw) ^ !REC_POL;
if (!sampled_value)
break;
} while (!stopwatch_expired(&sw));
@@ -117,7 +144,7 @@ static enum switch_state get_switch_state(void)
printk(BIOS_INFO, "wipeout requested, checking recovery\n");
stopwatch_init_msecs_expire(&sw, RECOVERY_MODE_EXTRA_DELAY_MS);
do {
- sampled_value = read_gpio(REC_SW) ^ !REC_POL;
+ sampled_value = read_gpio(rec_sw) ^ !REC_POL;
if (!sampled_value)
break;
} while (!stopwatch_expired(&sw));
@@ -149,5 +176,5 @@ int get_wipeout_mode_switch(void)
int get_write_protect_state(void)
{
- return read_gpio(WP_SW) ^ !WP_POL;
+ return read_gpio(get_wp_status_gpio_pin()) ^ !WP_POL;
}
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
index 3a90048..e5ea828 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
@@ -134,11 +134,9 @@ typedef struct {
#define IPQ_GMAC_NMACS 4
enum gale_board_id {
- BOARD_ID_PROTO_0 = 0,
- BOARD_ID_PROTO_0_2 = 1,
- BOARD_ID_WHIRLWIND = 2,
- BOARD_ID_WHIRLWIND_SP5 = 3,
- BOARD_ID_PROTO_0_2_NAND = 26,
+ BOARD_ID_GALE_EVT = 0,
+ BOARD_ID_GALE_EVT2 = 1,
+ BOARD_ID_GALE_EVT3 = 2,
};
/* Board specific parameters */
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