[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp2_0: don't use saved memory data in recovery mode
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Tue Jul 19 00:54:02 CEST 2016
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15745
-gerrit
commit d3f51992871519430d4128b7d2bbdad679fb1e81
Author: Aaron Durbin <adurbin at chromium.org>
Date: Mon Jul 18 11:31:53 2016 -0500
drivers/intel/fsp2_0: don't use saved memory data in recovery mode
If the system is in recovery mode force a full retrain.
BUG=chrome-os-partner:52679
Change-Id: I4e87685600880d815fe3198b820a10aa269baf37
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/drivers/intel/fsp2_0/memory_init.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 5168a79..70c920e 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -14,6 +14,7 @@
#include <arch/io.h>
#include <arch/cpu.h>
#include <arch/symbols.h>
+#include <bootmode.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
@@ -107,6 +108,12 @@ static void fsp_fill_mrc_cache(struct FSPM_ARCH_UPD *arch_upd, bool s3wake,
if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS))
return;
+ /* Don't use saved training data when recovery mode is enabled. */
+ if (recovery_mode_enabled()) {
+ printk(BIOS_DEBUG, "Recovery mode. Not using MRC cache.\n");
+ return;
+ }
+
if (mrc_cache_get_current_with_version(&mrc_cache, fsp_version)) {
printk(BIOS_DEBUG, "MRC cache was not found\n");
return;
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