[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp2_0: Split reset handling logic
Andrey Petrov (andrey.petrov@intel.com)
gerrit at coreboot.org
Mon Jul 18 23:30:57 CEST 2016
Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15730
-gerrit
commit 6e6886563e395bb2d93035eb0902978d33d95d1f
Author: Andrey Petrov <andrey.petrov at intel.com>
Date: Mon Jul 18 00:15:41 2016 -0700
drivers/intel/fsp2_0: Split reset handling logic
FSP 2.0 spec only defines 2 reset request (COLD, WARM) exit codes. The
rest 6 codes are platform-specific and may vary. Modify helper function
so that only basic resets are handled and let SoC deal with the rest.
Change-Id: Ib2f446e0449301407b135933a2088bcffc3ac32a
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
src/drivers/intel/fsp2_0/include/fsp/api.h | 9 ++++++---
src/drivers/intel/fsp2_0/include/fsp/util.h | 12 +++++++++---
src/drivers/intel/fsp2_0/util.c | 26 ++++++++++++++++++--------
src/soc/intel/apollolake/chip.c | 3 +--
src/soc/intel/apollolake/reset.c | 14 ++++++++++++++
5 files changed, 48 insertions(+), 16 deletions(-)
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index aa45d97..2fd576d 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -23,9 +23,12 @@ enum fsp_status {
FSP_SUCCESS = 0x00000000,
FSP_STATUS_RESET_REQUIRED_COLD = 0x40000001,
FSP_STATUS_RESET_REQUIRED_WARM = 0x40000002,
- FSP_STATUS_RESET_REQUIRED_SHUTDOWN = 0x40000003,
- FSP_STATUS_RESET_REQUIRED_UNDEFINED = 0x40000004,
- FSP_STATUS_RESET_REQUIRED_GLOBAL_RESET = 0x40000005,
+ FSP_STATUS_RESET_REQUIRED_3 = 0x40000003,
+ FSP_STATUS_RESET_REQUIRED_4 = 0x40000004,
+ FSP_STATUS_RESET_REQUIRED_5 = 0x40000005,
+ FSP_STATUS_RESET_REQUIRED_6 = 0x40000006,
+ FSP_STATUS_RESET_REQUIRED_7 = 0x40000007,
+ FSP_STATUS_RESET_REQUIRED_8 = 0x40000008,
FSP_INVALID_PARAMETER = 0x80000002,
FSP_UNSUPPORTED = 0x80000003,
FSP_NOT_READY = 0x80000006,
diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h
index d546c11..bd32276 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/util.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/util.h
@@ -40,9 +40,15 @@ enum cb_err fsp_load_binary(struct fsp_header *hdr, const char *name,
/* Load a vbt.bin file for graphics. Returns 0 if a valid VBT is not found. */
uintptr_t fsp_load_vbt(void);
-/* Trivial handling of reset exit statuses */
+/*
+ * Handle FSP reboot request status. Chipset/soc is expected to provide
+ * chipset_handle_reset() that deals with reset type codes specific to given
+ * SoC. If the requested status is not a reboot status or unhandled, this
+ * function does nothing.
+ */
void fsp_handle_reset(enum fsp_status status);
-/* Returns true if the non-success status is a reset request */
-bool fsp_reset_requested(enum fsp_status status);
+
+/* SoC/chipset must provide this to handle platform-specific reset codes */
+void chipset_handle_reset(enum fsp_status status);
#endif /* _FSP2_0_UTIL_H_ */
diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c
index b47b898..3353a93 100644
--- a/src/drivers/intel/fsp2_0/util.c
+++ b/src/drivers/intel/fsp2_0/util.c
@@ -162,8 +162,19 @@ enum cb_err fsp_load_binary(struct fsp_header *hdr,
return CB_SUCCESS;
}
+static bool fsp_reset_requested(enum fsp_status status)
+{
+ return (status >= FSP_STATUS_RESET_REQUIRED_COLD &&
+ status <= FSP_STATUS_RESET_REQUIRED_8);
+}
+
void fsp_handle_reset(enum fsp_status status)
{
+ if (!fsp_reset_requested(status))
+ return;
+
+ printk(BIOS_DEBUG, "FSP: handling reset type %x\n", status);
+
switch(status) {
case FSP_STATUS_RESET_REQUIRED_COLD:
hard_reset();
@@ -171,16 +182,15 @@ void fsp_handle_reset(enum fsp_status status)
case FSP_STATUS_RESET_REQUIRED_WARM:
soft_reset();
break;
- case FSP_STATUS_RESET_REQUIRED_GLOBAL_RESET:
- global_reset();
+ case FSP_STATUS_RESET_REQUIRED_3:
+ case FSP_STATUS_RESET_REQUIRED_4:
+ case FSP_STATUS_RESET_REQUIRED_5:
+ case FSP_STATUS_RESET_REQUIRED_6:
+ case FSP_STATUS_RESET_REQUIRED_7:
+ case FSP_STATUS_RESET_REQUIRED_8:
+ chipset_handle_reset(status);
break;
default:
break;
}
}
-
-bool fsp_reset_requested(enum fsp_status status)
-{
- return (status >= FSP_STATUS_RESET_REQUIRED_COLD &&
- status <= FSP_STATUS_RESET_REQUIRED_GLOBAL_RESET);
-}
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index accc1bb..748d41d 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -417,8 +417,7 @@ static void fsp_notify_dummy(void *arg)
if ((ret = fsp_notify(ph)) != FSP_SUCCESS) {
printk(BIOS_CRIT, "FspNotify failed, ret = %x!\n", ret);
- if (fsp_reset_requested(ret))
- fsp_handle_reset(ret);
+ fsp_handle_reset(ret);
}
/* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */
if (ph == READY_TO_BOOT) {
diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c
index f759bac..4bfdee4 100644
--- a/src/soc/intel/apollolake/reset.c
+++ b/src/soc/intel/apollolake/reset.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <delay.h>
+#include <fsp/util.h>
#include <reset.h>
#include <soc/heci.h>
#include <soc/pm.h>
@@ -57,3 +58,16 @@ void reset_prepare(void)
}
printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw));
}
+
+void chipset_handle_reset(enum fsp_status status)
+{
+ switch(status) {
+ case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */
+ global_reset();
+ break;
+ default:
+ printk(BIOS_ERR, "unhandled reset type %x\n", status);
+ die("unknown reset type");
+ break;
+ }
+}
More information about the coreboot-gerrit
mailing list