[coreboot-gerrit] Patch set updated for coreboot: cbmem: share additional time stamps IDs
Antonello Dettori (dev@dettori.io)
gerrit at coreboot.org
Mon Jul 18 17:16:28 CEST 2016
Antonello Dettori (dev at dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15725
-gerrit
commit d22840078a3bb2ac6b6bd84e2fc0dc861d9a021c
Author: Antonello Dettori <dev at dettori.io>
Date: Sat Jul 16 16:20:30 2016 +0200
cbmem: share additional time stamps IDs
Split the additional time stamps concerning depthcharge from
the cbmem utility sourcecode and move them into
commonlib/timestamp_serialized.h header.
Change-Id: Ic23c3bc12eac246336b2ba7c7c39eb2673897d5a
Signed-off-by: Antonello Dettori <dev at dettori.io>
---
.../include/commonlib/timestamp_serialized.h | 96 +++++++++++++++++++++
util/cbmem/cbmem.c | 98 ----------------------
2 files changed, 96 insertions(+), 98 deletions(-)
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h
index c665964..aec93c4 100644
--- a/src/commonlib/include/commonlib/timestamp_serialized.h
+++ b/src/commonlib/include/commonlib/timestamp_serialized.h
@@ -88,6 +88,102 @@ enum timestamp_id {
TS_FSP_AFTER_FINALIZE = 959,
/* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */
+
+ /* Depthcharge entry IDs start at 1000 */
+ TS_DC_START = 1000,
+
+ TS_RO_PARAMS_INIT = 1001,
+ TS_RO_VB_INIT = 1002,
+ TS_RO_VB_SELECT_FIRMWARE = 1003,
+ TS_RO_VB_SELECT_AND_LOAD_KERNEL = 1004,
+
+ TS_RW_VB_SELECT_AND_LOAD_KERNEL = 1010,
+
+ TS_VB_SELECT_AND_LOAD_KERNEL = 1020,
+ TS_VB_EC_VBOOT_DONE = 1030,
+ TS_VB_STORAGE_INIT_DONE = 1040,
+ TS_VB_READ_KERNEL_DONE = 1050,
+ TS_VB_VBOOT_DONE = 1100,
+
+ TS_START_KERNEL = 1101,
+ TS_KERNEL_DECOMPRESSION = 1102,
+};
+
+static const struct timestamp_id_to_name {
+ uint32_t id;
+ const char *name;
+} timestamp_ids[] = {
+ /* Marker to report base_time. */
+ { 0, "1st timestamp" },
+ { TS_START_ROMSTAGE, "start of rom stage" },
+ { TS_BEFORE_INITRAM, "before ram initialization" },
+ { TS_AFTER_INITRAM, "after ram initialization" },
+ { TS_END_ROMSTAGE, "end of romstage" },
+ { TS_START_VBOOT, "start of verified boot" },
+ { TS_END_VBOOT, "end of verified boot" },
+ { TS_START_COPYRAM, "starting to load ramstage" },
+ { TS_END_COPYRAM, "finished loading ramstage" },
+ { TS_START_RAMSTAGE, "start of ramstage" },
+ { TS_START_BOOTBLOCK, "start of bootblock" },
+ { TS_END_BOOTBLOCK, "end of bootblock" },
+ { TS_START_COPYROM, "starting to load romstage" },
+ { TS_END_COPYROM, "finished loading romstage" },
+ { TS_START_ULZMA, "starting LZMA decompress (ignore for x86)" },
+ { TS_END_ULZMA, "finished LZMA decompress (ignore for x86)" },
+ { TS_START_ULZ4F, "starting LZ4 decompress (ignore for x86)" },
+ { TS_END_ULZ4F, "finished LZ4 decompress (ignore for x86)" },
+ { TS_DEVICE_ENUMERATE, "device enumeration" },
+ { TS_DEVICE_CONFIGURE, "device configuration" },
+ { TS_DEVICE_ENABLE, "device enable" },
+ { TS_DEVICE_INITIALIZE, "device initialization" },
+ { TS_DEVICE_DONE, "device setup done" },
+ { TS_CBMEM_POST, "cbmem post" },
+ { TS_WRITE_TABLES, "write tables" },
+ { TS_LOAD_PAYLOAD, "load payload" },
+ { TS_ACPI_WAKE_JUMP, "ACPI wake jump" },
+ { TS_SELFBOOT_JUMP, "selfboot jump" },
+
+ { TS_START_COPYVER, "starting to load verstage" },
+ { TS_END_COPYVER, "finished loading verstage" },
+ { TS_START_TPMINIT, "starting to initialize TPM" },
+ { TS_END_TPMINIT, "finished TPM initialization" },
+ { TS_START_VERIFY_SLOT, "starting to verify keyblock/preamble (RSA)" },
+ { TS_END_VERIFY_SLOT, "finished verifying keyblock/preamble (RSA)" },
+ { TS_START_HASH_BODY, "starting to verify body (load+SHA2+RSA) " },
+ { TS_DONE_LOADING, "finished loading body (ignore for x86)" },
+ { TS_DONE_HASHING, "finished calculating body hash (SHA2)" },
+ { TS_END_HASH_BODY, "finished verifying body signature (RSA)" },
+
+ { TS_START_COPYVPD, "starting to load Chrome OS VPD" },
+ { TS_END_COPYVPD_RO, "finished loading Chrome OS VPD (RO)" },
+ { TS_END_COPYVPD_RW, "finished loading Chrome OS VPD (RW)" },
+
+ { TS_DC_START, "depthcharge start" },
+ { TS_RO_PARAMS_INIT, "RO parameter init" },
+ { TS_RO_VB_INIT, "RO vboot init" },
+ { TS_RO_VB_SELECT_FIRMWARE, "RO vboot select firmware" },
+ { TS_RO_VB_SELECT_AND_LOAD_KERNEL, "RO vboot select&load kernel" },
+ { TS_RW_VB_SELECT_AND_LOAD_KERNEL, "RW vboot select&load kernel" },
+ { TS_VB_SELECT_AND_LOAD_KERNEL, "vboot select&load kernel" },
+ { TS_VB_EC_VBOOT_DONE, "finished EC verification" },
+ { TS_VB_STORAGE_INIT_DONE, "finished storage device initialization" },
+ { TS_VB_READ_KERNEL_DONE, "finished reading kernel from disk" },
+ { TS_VB_VBOOT_DONE, "finished vboot kernel verification" },
+ { TS_KERNEL_DECOMPRESSION, "starting kernel decompression/relocation" },
+ { TS_START_KERNEL, "jumping to kernel" },
+
+ /* FSP related timestamps */
+ { TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" },
+ { TS_FSP_MEMORY_INIT_END, "returning from FspMemoryInit" },
+ { TS_FSP_TEMP_RAM_EXIT_START, "calling FspTempRamExit" },
+ { TS_FSP_TEMP_RAM_EXIT_END, "returning from FspTempRamExit" },
+ { TS_FSP_SILICON_INIT_START, "calling FspSiliconInit" },
+ { TS_FSP_SILICON_INIT_END, "returning from FspSiliconInit" },
+ { TS_FSP_BEFORE_ENUMERATE, "calling FspNotify(AfterPciEnumeration)" },
+ { TS_FSP_AFTER_ENUMERATE,
+ "returning from FspNotify(AfterPciEnumeration)" },
+ { TS_FSP_BEFORE_FINALIZE, "calling FspNotify(ReadyToBoot)" },
+ { TS_FSP_AFTER_FINALIZE, "returning from FspNotify(ReadyToBoot)" }
};
#endif
diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c
index 5cc55da..5e56d11 100644
--- a/util/cbmem/cbmem.c
+++ b/util/cbmem/cbmem.c
@@ -459,104 +459,6 @@ static void print_norm(u64 v)
}
}
-enum additional_timestamp_id {
- // Depthcharge entry IDs start at 1000.
- TS_DC_START = 1000,
-
- TS_RO_PARAMS_INIT = 1001,
- TS_RO_VB_INIT = 1002,
- TS_RO_VB_SELECT_FIRMWARE = 1003,
- TS_RO_VB_SELECT_AND_LOAD_KERNEL = 1004,
-
- TS_RW_VB_SELECT_AND_LOAD_KERNEL = 1010,
-
- TS_VB_SELECT_AND_LOAD_KERNEL = 1020,
- TS_VB_EC_VBOOT_DONE = 1030,
- TS_VB_STORAGE_INIT_DONE = 1040,
- TS_VB_READ_KERNEL_DONE = 1050,
- TS_VB_VBOOT_DONE = 1100,
-
- TS_START_KERNEL = 1101,
- TS_KERNEL_DECOMPRESSION = 1102,
-};
-
-static const struct timestamp_id_to_name {
- u32 id;
- const char *name;
-} timestamp_ids[] = {
- /* Marker to report base_time. */
- { 0, "1st timestamp" },
- { TS_START_ROMSTAGE, "start of rom stage" },
- { TS_BEFORE_INITRAM, "before ram initialization" },
- { TS_AFTER_INITRAM, "after ram initialization" },
- { TS_END_ROMSTAGE, "end of romstage" },
- { TS_START_VBOOT, "start of verified boot" },
- { TS_END_VBOOT, "end of verified boot" },
- { TS_START_COPYRAM, "starting to load ramstage" },
- { TS_END_COPYRAM, "finished loading ramstage" },
- { TS_START_RAMSTAGE, "start of ramstage" },
- { TS_START_BOOTBLOCK, "start of bootblock" },
- { TS_END_BOOTBLOCK, "end of bootblock" },
- { TS_START_COPYROM, "starting to load romstage" },
- { TS_END_COPYROM, "finished loading romstage" },
- { TS_START_ULZMA, "starting LZMA decompress (ignore for x86)" },
- { TS_END_ULZMA, "finished LZMA decompress (ignore for x86)" },
- { TS_START_ULZ4F, "starting LZ4 decompress (ignore for x86)" },
- { TS_END_ULZ4F, "finished LZ4 decompress (ignore for x86)" },
- { TS_DEVICE_ENUMERATE, "device enumeration" },
- { TS_DEVICE_CONFIGURE, "device configuration" },
- { TS_DEVICE_ENABLE, "device enable" },
- { TS_DEVICE_INITIALIZE, "device initialization" },
- { TS_DEVICE_DONE, "device setup done" },
- { TS_CBMEM_POST, "cbmem post" },
- { TS_WRITE_TABLES, "write tables" },
- { TS_LOAD_PAYLOAD, "load payload" },
- { TS_ACPI_WAKE_JUMP, "ACPI wake jump" },
- { TS_SELFBOOT_JUMP, "selfboot jump" },
-
- { TS_START_COPYVER, "starting to load verstage" },
- { TS_END_COPYVER, "finished loading verstage" },
- { TS_START_TPMINIT, "starting to initialize TPM" },
- { TS_END_TPMINIT, "finished TPM initialization" },
- { TS_START_VERIFY_SLOT, "starting to verify keyblock/preamble (RSA)" },
- { TS_END_VERIFY_SLOT, "finished verifying keyblock/preamble (RSA)" },
- { TS_START_HASH_BODY, "starting to verify body (load+SHA2+RSA) " },
- { TS_DONE_LOADING, "finished loading body (ignore for x86)" },
- { TS_DONE_HASHING, "finished calculating body hash (SHA2)" },
- { TS_END_HASH_BODY, "finished verifying body signature (RSA)" },
-
- { TS_START_COPYVPD, "starting to load Chrome OS VPD" },
- { TS_END_COPYVPD_RO, "finished loading Chrome OS VPD (RO)" },
- { TS_END_COPYVPD_RW, "finished loading Chrome OS VPD (RW)" },
-
- { TS_DC_START, "depthcharge start" },
- { TS_RO_PARAMS_INIT, "RO parameter init" },
- { TS_RO_VB_INIT, "RO vboot init" },
- { TS_RO_VB_SELECT_FIRMWARE, "RO vboot select firmware" },
- { TS_RO_VB_SELECT_AND_LOAD_KERNEL, "RO vboot select&load kernel" },
- { TS_RW_VB_SELECT_AND_LOAD_KERNEL, "RW vboot select&load kernel" },
- { TS_VB_SELECT_AND_LOAD_KERNEL, "vboot select&load kernel" },
- { TS_VB_EC_VBOOT_DONE, "finished EC verification" },
- { TS_VB_STORAGE_INIT_DONE, "finished storage device initialization" },
- { TS_VB_READ_KERNEL_DONE, "finished reading kernel from disk" },
- { TS_VB_VBOOT_DONE, "finished vboot kernel verification" },
- { TS_KERNEL_DECOMPRESSION, "starting kernel decompression/relocation" },
- { TS_START_KERNEL, "jumping to kernel" },
-
- /* FSP related timestamps */
- { TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" },
- { TS_FSP_MEMORY_INIT_END, "returning from FspMemoryInit" },
- { TS_FSP_TEMP_RAM_EXIT_START, "calling FspTempRamExit" },
- { TS_FSP_TEMP_RAM_EXIT_END, "returning from FspTempRamExit" },
- { TS_FSP_SILICON_INIT_START, "calling FspSiliconInit" },
- { TS_FSP_SILICON_INIT_END, "returning from FspSiliconInit" },
- { TS_FSP_BEFORE_ENUMERATE, "calling FspNotify(AfterPciEnumeration)" },
- { TS_FSP_AFTER_ENUMERATE,
- "returning from FspNotify(AfterPciEnumeration)" },
- { TS_FSP_BEFORE_FINALIZE, "calling FspNotify(ReadyToBoot)" },
- { TS_FSP_AFTER_FINALIZE, "returning from FspNotify(ReadyToBoot)" }
-};
-
static const char *timestamp_name(uint32_t id)
{
int i;
More information about the coreboot-gerrit
mailing list