[coreboot-gerrit] Patch merged into coreboot/master: mainboards: align on using ACPI_Sx definitions

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 30b0c7adf0a5d77a8e902dbbf0ee68954bf28385
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Jul 13 13:01:13 2016 -0500

    mainboards: align on using ACPI_Sx definitions
    
    The mainboard_smi_sleep() function takes ACPI sleep values
    of the form S3=3, S4=4, S5=5, etc. All the chipsets ensure
    that whatever hardware PM1 control register values are used
    the interface to the mainboard is the same. Move all the
    SMI handlers in the mainboard directory to not open code
    the literal values 3 and 5 for ACPI_S3 and ACPI_S5.
    
    There were a few notable exceptions where the code was
    attempting to use the hardware values and not the common
    translated values. The few users of SLEEP_STATE_X were
    updated to align with ACPI_SX as those defines are
    already equal. The removal of SLEEP_STATE_X defines is
    forthcoming in a subsequent patch.
    
    BUG=chrome-os-partner:54977
    
    Change-Id: I76592c9107778cce5995e5af764760453f54dc50
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://review.coreboot.org/15664
    Tested-by: build bot (Jenkins)
    Reviewed-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-by: Furquan Shaikh <furquan at google.com>


See https://review.coreboot.org/15664 for details.

-gerrit